ADUC7020BCPZ62I-RL Analog Devices Inc, ADUC7020BCPZ62I-RL Datasheet - Page 6

• Manufacturer Part Number: ADUC7020BCPZ62I-RL
• Description: IC,MICROCONTROLLER,16-BIT,ARM7 CPU,CMOS,LLCC,40PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC7xxxr

Specifications of ADUC7020BCPZ62I-RL

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 44MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: PLA, PWM, PSM, Temp Sensor, WDT
• Number Of I /o: 14
• Program Memory Size: 62KB (62K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 5x12b; D/A 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 40-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUC7020QSZ - KIT DEV ADUC7020 QUICK STARTEVAL-ADUC7020MKZ - KIT MINI DEV FOR ADUC7026/7027
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC7019/20/21/22/24/25/26/27/28/29
SPECIFICATIONS
AV
Table 1.
Parameter
ADC CHANNEL SPECIFICATIONS
ENDPOINT ERRORS
DYNAMIC PERFORMANCE
ANALOG INPUT
ON-CHIP VOLTAGE REFERENCE
EXTERNAL REFERENCE INPUT
DAC CHANNEL SPECIFICATIONS
ANALOG OUTPUTS
Output Voltage Range_2
Output Impedance
ADC Power-Up Time
DC Accuracy
Resolution
Integral Nonlinearity
Differential Nonlinearity
DC Code Distribution
Offset Error
Offset Error Match
Gain Error
Gain Error Match
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Peak Harmonic or Spurious Noise
Channel-to-Channel Crosstalk
Input Voltage Ranges
Leakage Current
Input Capacitance
Output Voltage
Accuracy
Reference Temperature Coefficient
Power Supply Rejection Ratio
Output Impedance
Internal V
Input Voltage Range
DC Accuracy
Output Voltage Range_0
Output Voltage Range_1
DD
(PHSN)
Differential Mode
Single-Ended Mode
Resolution
Relative Accuracy
Differential Nonlinearity
Offset Error
Gain Error
Gain Error Mismatch
= IOV
REF
DD
Power-On Time
8
= 2.7 V to 3.6 V, V
1, 2
7
5
3, 4
REF
= 2.5 V internal reference, f
Min
12
0.625
Typ
5
±0.6
±1.0
±0.5
+0.7/−0.6
1
±1
±1
±2
±1
69
−78
−75
−80
±1
20
2.5
±40
75
70
1
12
±2
0.1
0 to DAC
0 to 2.5
0 to DACV
2
REF
DD
Rev. C | Page 6 of 96
CORE
Max
±1.5
+1/−0.9
±2
±5
V
0 to V
±6
±5
AV
±1
±15
±1
CM
DD
6
= 41.78 MHz, T
± V
REF
REF
/2
Unit
μs
Bits
LSB
LSB
LSB
LSB
LSB
LSB
LSB
dB
dB
dB
V
V
μA
pF
V
mV
ppm/°C
dB
ms
V
Bits
LSB
LSB
mV
%
V
V
Ω
LSB
LSB
dB
Ω
%
V
A
= −40°C to +125°C, unless otherwise noted.
Eight acquisition clocks and fADC/2
% of full scale on DAC0
Test Conditions/Comments
2.5 V internal reference
1.0 V external reference
2.5 V internal reference
1.0 V external reference
ADC input is a dc voltage
f
Includes distortion and noise components
Measured on adjacent channels
During ADC acquisition
0.47 μF from V
T
T
R
Guaranteed monotonic
2.5 V internal reference
DAC
IN
A
A
L
= 5 kΩ, C
= 10 kHz sine wave, f
= 25°C
= 25°C
REF
range: DACGND to DACV
L
= 100 pF
REF
to AGND
SAMPLE
= 1 MSPS
DD