ADUM6132ARWZ-RL Analog Devices Inc, ADUM6132ARWZ-RL Datasheet - Page 12

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ADUM6132ARWZ-RL

Manufacturer Part Number
ADUM6132ARWZ-RL
Description
IC,Single MOSFET Driver,SOP,16PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
isoPower®r
Datasheet

Specifications of ADUM6132ARWZ-RL

Inputs - Side 1/side 2
2/0
Number Of Channels
2
Isolation Rating
*
Voltage - Supply
4.5 V ~ 5.5 V
Propagation Delay
60ns
Output Type
Logic
Package / Case
16-SOIC (0.300", 7.5mm Width)
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Outputs
2
Configuration
Half Bridge
Input Type
Non-Inverting
Delay Time
60ns
Current - Peak
200mA
Number Of Configurations
1
High Side Voltage - Max (bootstrap)
17V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADuM6132
In applications involving high common-mode transients, care
should be taken to ensure that board capacitive coupling across
the isolation barrier is minimized. Furthermore, the board
layout should be designed so that any coupling that does occur
affects all pins on a given component side equally. Failure to
ensure this may cause voltage differentials between pins that
exceed the absolute maximum ratings of the device (see Table 7),
leading to latch-up or permanent damage.
The ADuM6132 is a power device that dissipates approximately
1 W of power when fully loaded and running at maximum speed.
Because it is not possible to apply a heat sink to an isolation
device, the device depends primarily on heat dissipation into
the PCB through the GND pins. If the device will be used at
high ambient temperatures, provide a thermal path from the
GND pins to the PCB ground plane.
The board layout in Figure 17 shows enlarged pads for Pin 8
(GND) and Pin 9 (GND
ented from the pad to the ground plane. This layout significantly
reduces the temperatures inside the chip. The dimensions of the
expanded pads are left to the discretion of the designer and the
available board space.
THERMAL ANALYSIS
The ADuM6132 consists of several internal die attached to
two lead frame paddles. For the purposes of thermal analysis,
the part is treated as a thermal unit with the highest junction
temperature determining θ
θ
a JEDEC standard 4-layer board with fine width traces and still
air. Under normal operating conditions, the ADuM6132 oper-
ates at full load across the full temperature range without derating
the output current. However, following the recommendations in
the PCB Layout section decreases the thermal resistance to the
PCB, allowing increased thermal margin at high ambient
temperatures.
Under V
Figure 9, the package power dissipation quickly exceeds the safe
operating limit of 1.44 W for ambient temperatures up to 85°C.
At low input voltage, the power dissipation can approach 2 W.
Because internal compensation of the PWM makes low V
worst-case condition, input voltage limiting is not an effective
strategy for protecting the ADuM6132 from output load fault
conditions. Therefore, the preferred protection methods, where
required, are either limiting ambient temperature to 60°C or the
use of a fuse.
JA
is based on measurements taken with the part mounted on
V
V
GND
GND
V
V
DDB
DDL
V
V
DD
OB
ISO
IA
IB
output short-circuit conditions, as shown in
Figure 17. Recommended PCB Layout
ISO
). Multiple vias should be implem-
JA
, as shown in Table 2. The value of
V
GND
GND
V
V
NC
NC
GND
ISO
DDA
OA
ISO
A
ISO
DD
a
Rev. 0 | Page 12 of 16
UNDERVOLTAGE LOCKOUT
The ADuM6132 has undervoltage lockout (UVLO) circuits on
the V
UVLO circuit monitors the supply voltage and takes a predeter-
mined action based on whether the supply voltage is above or
below a given threshold. These thresholds are specified in Table 1.
In the recommended configuration shown in Figure 16, only
two independent supplies are controlled by the user: V
V
internal dc-to-dc converter via the V
tion. Nevertheless, the V
Table 11 to show how the V
dc-to-dc converter powers on and off.
Table 11. Undervoltage Lockout Functionality
User-Provided
Supplies
V
H
H
X
L
1
When all three supplies are above their respective UVLO
thresholds, the ADuM6132 operates normally. The internal
dc-to-dc converter is active, and both outputs operate as
determined by their respective input logic signals. If either of
the user-provided supplies is below its UVLO threshold, the
ADuM6132 is put into a disabled mode. In this mode, the
internal dc-to-dc converter is turned off and both outputs are
driven low.
The V
UVLO circuit (whichever is below its threshold). The V
output is driven low when the internal dc-to-dc converter is
turned off. The V
to drop also because V
When V
circuit drives V
H: supply voltage > UVLO threshold; L: supply voltage < UVLO threshold;
X: supply voltage level is irrelevant.
DDL
DDL
/V
DDL
OB
DD
, V
DDA
output is driven low by either the V
(V
V
H
H
L
X
DDA
DDB
is below its UVLO threshold, the V
DDL
, and V
OA
= V
ISO
low.
DD
V
Supply
V
H
L
X
X
supply voltage drops to 0 V, causing V
DDB
ISO
DDA
in Figure 16). V
ISO
Powered
supplies. For each supply, the respective
DDA
and V
OA
UVLO functionality is included in
output behaves when the internal
DDA
Internal dc-to-dc converter is
Internal dc-to-dc converter is
are externally connected.
Effect
Normal operation.
Internal dc-to-dc converter is
active.
V
match V
Internal dc-to-dc converter is
active but V
threshold.
V
V
turned off (V
V
V
turned off (V
V
V
OA
OA
OB
OA
OB
OA
OB
ISO
/V
DDA
output operates normally.
output is driven low.
output is driven low.
output is driven low.
output is driven low.
output is driven low.
= V
OB
is supplied by the
output logic states
IA
DDA
/V
DDL
IB
ISO
external connec-
ISO
ISO
DDA
input logic states.
or V
1
is below UVLO
= 0).
= 0).
UVLO
DDB
DDB
OA
and
DDA

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