AM29LV160DT-90EC Spansion Inc., AM29LV160DT-90EC Datasheet

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AM29LV160DT-90EC

Manufacturer Part Number
AM29LV160DT-90EC
Description
Flash Memory IC
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29LV160DT-90EC

Memory Configuration
2M X 8 / 1M X 16 Bit
Package/case
48-TSOP
Supply Voltage Max
3.6V
Leaded Process Compatible
No
Peak Reflow Compatible (260 C)
No
Access Time, Tacc
90nS
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Am29LV160D
Data Sheet
RETIRED
PRODUCT
This product has been retired and is not recommended for designs. For new and current designs,
S29AL016D supersedes Am29LV160D and is the factory-recommended migration path for this
device. Please refer to the S29AL016D data sheet for specifications and ordering information. Avail-
ability of this document is retained for reference and historical purposes only.
The following document contains information on Spansion memory products.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal data sheet improvement and are noted in the
document revision summary.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number 22358
Revision B
Amendment 7
Issue Date May 5, 2006

Related parts for AM29LV160DT-90EC

AM29LV160DT-90EC Summary of contents

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Data Sheet This product has been retired and is not recommended for designs. For new and current designs, S29AL016D supersedes Am29LV160D and is the factory-recommended migration path for this device. Please refer to the S29AL016D data sheet for specifications and ...

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THIS PAGE LEFT INTENTIONALLY BLANK. ...

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DATA SHEET Am29LV160D 16 Megabit ( 8-Bit 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory This product has been retired and is not recommended for designs. For new and current designs, S29AL016D supersedes Am29LV160D and is ...

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GENERAL DESCRIPTION The Am29LV160D Mbit, 3.0 Volt-only Flash memory organized as 2,097,152 bytes or 1,048,576 words. The device is offered in 48-ball FBGA, 44-pin SO, and 48-pin TSOP packages. The word-wide data (x16) appears on DQ15–DQ0; the ...

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... Program and Erase Operation Status .................................... 10 Standby Mode ........................................................................ 10 Automatic Sleep Mode ........................................................... 10 RESET#: Hardware Reset Pin ............................................... 11 Output Disable Mode .............................................................. 11 Table 2. Sector Address Tables (Am29LV160DT) ..........................12 Table 3. Sector Address Tables (Am29LV160DB) ..........................13 Autoselect Mode ..................................................................... 14 Table 4. Am29LV160D Autoselect Codes (High Voltage Method) ..14 Sector Protection/Unprotection ............................................... 14 Temporary Sector Unprotect .................................................. 15 Figure 1 ...

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PRODUCT SELECTOR GUIDE Family Part Number Speed Option Voltage Range: V Max access time ACC Max CE# access time Max OE# access time Note: See “AC Characteristics” for full ...

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CONNECTION DIAGRAMS A15 1 A14 2 A13 3 A12 4 A11 5 A10 A19 WE# 11 RESET RY/BY A18 A17 ...

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CONNECTION DIAGRAMS RESET# 1 A18 2 A17 CE OE# 14 DQ0 15 DQ8 16 DQ1 17 DQ9 18 DQ2 ...

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PIN CONFIGURATION A0–A19 =20 addresses DQ0–DQ14 =15 data inputs/outputs DQ15/A-1 =DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# =Selects 8-bit or 16-bit mode CE# =Chip enable OE# = Output enable WE# =Write enable RESET# =Hardware reset ...

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... See Product Selector Guide and Valid Combinations BOOT CODE SECTOR ARCHITECTURE T = Top sector B = Bottom sector Valid Combinations for FBGA Packages Order Number Am29LV160DT-70, Am29LV160DB-70 FC, FI Am29LV160DT-90, Am29LV160DB-90 Am29LV160DT-120, Am29LV160DB-120 Am29LV160D C) C) with Pb-Free Package Package Marking L160DT70V, L160DB70V WCC, WCI, L160DT90V, ...

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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is composed of ...

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WE# and CE and OE For program operations, the BYTE# pin determines whether the device accepts program data in bytes or words. Refer to “Word/Byte ...

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RESET#: Hardware Reset Pin The RESET# pin provides a hardware method of re- setting the device to reading array data. When the system drives the RESET# pin to V riod the device immediately terminates any RP operation ...

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... Table 2. Sector Address Tables (Am29LV160DT) Sector A19 A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 SA6 SA7 SA8 SA9 SA10 SA11 SA12 SA13 SA14 SA15 SA16 SA17 SA18 SA19 SA20 SA21 SA22 SA23 SA24 SA25 SA26 SA27 SA28 SA29 ...

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Table 3. Sector Address Tables (Am29LV160DB) Sector A19 A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 0 0 ...

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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equip ...

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Temporary Sector Unprotect This feature allows temporary unprotection of previ- ously protected sectors to change data in-system. The Sector Unprotect mode is activated by setting the RE- SET# pin During this mode, formerly protected ID sectors can ...

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START PLSCNT = 1 RESET Wait 1 μs No First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...

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COMMON FLASH MEMORY INTERFACE (CFI) The Common Flash Interface (CFI) specification out- lines device and host system software interrogation handshake, which allows specific vendor-specified software algorithms to be used for entire families of devices. Software support can then be device-inde- ...

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Addresses Addresses (Word Mode) (Byte Mode) 1Bh 36h 1Ch 38h 1Dh 3Ah 1Eh 3Ch 1Fh 3Eh 20h 40h 21h 42h 22h 44h 23h 46h 24h 48h 25h 4Ah 26h 4Ch Addresses Addresses (Word Mode) (Byte Mode) 27h 4Eh 28h 50h ...

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Table 8. Primary Vendor-Specific Extended Query Addresses Addresses (Word Mode) (Byte Mode) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h Hardware Data ...

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COMMAND DEFINITIONS Writing specific address and data commands or se- quences into the command register initiates device operations. Table 9 defines the valid register command sequences. Writing incorrect address and data val- ues or writing them in the improper sequence ...

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Any commands written to the device during the Em- bedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the program ...

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Figure 4 illustrates the algorithm for the erase opera- tion. See the Erase/Program Operations tables in “AC Characteristics” for parameters, and to Figure 18 for timing diagrams. Sector Erase Command Sequence Sector erase is a six bus cycle operation. The ...

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See “Autoselect Command Sequence” for more information. The system must write the Erase Resume command (address bits are “don’t care”) to exit the erase sus- pend mode and continue the sector erase operation. Further writes of the Resume ...

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Command Definitions Table 9. Am29LV160D Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte ...

Page 27

WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 10 and the following subsections describe the functions of these bits. DQ7, RY/BY#, and DQ6 ...

Page 28

RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...

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still toggling, the de- vice did not complete the operation successfully, and the system must write the reset command to return to reading array data. The ...

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DQ5: Exceeded Timing Limits DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under these conditions DQ5 produces a “1.” This is a failure condition that indicates the program or erase cycle was ...

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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . –65°C to +150°C Ambient Temperature with Power Applied ...

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V –0.5 V –2 Figure 7. Maximum Negative Overshoot Waveform OPERATING RANGES Commercial (C) Devices Ambient Temperature ( 0°C to +70°C A ...

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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current CC I CC2 (Notes ...

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DC CHARACTERISTICS (Continued) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...

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TEST CONDITIONS Device Under Test C L 6.2 kΩ Note: Diodes are IN3064 or equivalent Figure 11. Test Setup Key to Switching Waveforms WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 12. Input Waveforms ...

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AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...

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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded Algorithms) t READY to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...

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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...

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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...

Page 40

AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# OE# WE Data RY/BY# t VCS V CC Notes program address program data Illustration shows device in word ...

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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE# OE# WE Data RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid Address for reading status data ...

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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...

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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Temporary Sector ...

Page 44

AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# Note: For sector protect For sector unprotect ...

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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...

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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written ...

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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following conditions: 25 programming typicals ...

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PHYSICAL DIMENSIONS* TS 048—48-Pin Standard TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering Am29LV160D Dwg rev AA; 10/99 May 5, 2006 22358B7 ...

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PHYSICAL DIMENSIONS TSR048—48-Pin Reverse TSOP * For reference only. BSC is an ANSI standard for Basic Space Centering. 22358B7 May 5, 2006 Am29LV160D Dwg rev AA; 10/99 47 ...

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PHYSICAL DIMENSIONS FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA Am29LV160D Dwg rev AF; 10/99 May 5, 2006 22358B7 ...

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PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package 22358B7 May 5, 2006 Am29LV160D Dwg rev AC; 10/99 49 ...

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REVISION SUMMARY Revision A (January 1999) The Am29LV160D is fully form, fit, and function com- patible with the Am29LV160B device, with the following differences device at full voltage range is now available. The 80 ns speed option ...

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