AM29LV641DL90REF Spansion Inc., AM29LV641DL90REF Datasheet - Page 14
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AM29LV641DL90REF
Manufacturer Part Number
AM29LV641DL90REF
Description
Flash Memory IC
Manufacturer
Spansion Inc.
Datasheet
1.AM29LV641DL90REF.pdf
(57 pages)
Specifications of AM29LV641DL90REF
Memory Size
64Mbit
Memory Configuration
4M X 16
Ic Interface Type
Parallel
Access Time
90ns
Memory Case Style
TSOP
No. Of Pins
48
Mounting Type
Surface Mount
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The RESET# pin can be tied to the system reset cir-
cuitry. A system reset would thus also reset the Flash
memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
If RESET# is asserted during a program or erase op-
eration, the RY/BY# pin remains a “0” (busy) until the
internal reset operation is complete, which requires a
time of t
tem can thus monitor RY/BY# to determine whether
the reset operation is complete. If RESET# is asserted
when a program or erase operation is not executing
(RY/BY# pin is “1”), the reset operation is completed
12
Sector
SA10
SA11
SA12
SA13
SA14
SA15
SA16
SA17
SA18
SA19
SA20
SA21
SA22
SA23
SA24
SA25
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
SA8
SA9
READY
(during Embedded Algorithms). The sys-
A21
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
A20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 2. Sector Address Table (Sheet 1 of 4)
A19
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
Am29LV640D/Am29LV641D
D A T A
A18
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
A17
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
S H E E T
within a time of t
rithms). The system can read data t
SET# pin returns to V
Refer to the table
RESET# parameters and to
the timing diagram.
Output Disable Mode
When the OE# input is at V
disabled. The output pins are placed in the high
impedance state.
A16
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
A15
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
READY
“AC Characteristics” on page 37
IH
.
(not during Embedded Algo-
16-bit Address Range
IH
(in hexadecimal)
0C8000–0CFFFF
Figure 14, on page 38
, output from the device is
0A8000–0AFFFF
0B8000–0BFFFF
0C0000–0C7FFF
0A0000–0A7FFF
0B0000–0B7FFF
000000–007FFF
008000–00FFFF
010000–017FFF
018000–01FFFF
020000–027FFF
028000–02FFFF
030000–037FFF
038000–03FFFF
040000–047FFF
048000–04FFFF
050000–057FFF
058000–05FFFF
060000–067FFF
068000–06FFFF
070000–077FFF
078000–07FFFF
080000–087FFF
088000–08FFFF
090000–097FFF
098000–09FFFF
22366C6 January 22, 2007
RH
after the RE-
for
for