CS4299-JQZR Cirrus Logic Inc, CS4299-JQZR Datasheet - Page 45

• Manufacturer Part Number: CS4299-JQZR
• Description: IC AC97 Codec With SRC
• Manufacturer: Cirrus Logic Inc
• Series: SoundFusion™r
• Type: Audio Codec '97r

Specifications of CS4299-JQZR

• Data Interface: Serial
• Resolution (bits): 18 b, 20 b
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 85 / 87
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.3 V ~ 5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-LQFP
• No. Of Dacs: 1
• No. Of Input Channels: 6
• No. Of Output Channels: 2
• Adc / Dac Resolution: 20bit
• Adcs / Dacs Signal To Noise Ratio: 70dB
• Sampling Rate: 48kSPS
• Supply Voltage Range: 3.135V To 3.465V, 4.75V To 5.25V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS319PP6
Analog Reference, Filters, and Configuration
REFFLT - Internal Reference Voltage, Input, Pin 27
Vrefout - Voltage Reference, Output, Pin 28
AFLT1 - Left ADC Channel Antialiasing Filter, Input, Pin 29
AFLT2 - Right ADC Channel Antialiasing Filter, Input, Pin 30
FLTI, FLTO - 3D Filter, Input, Pin 33 and 34
FLT3D - 3D Filter, Input, Pin 32
BCFG - Beep Configuration, Input, Pin 31
Misc. Digital Interfaces
S/PDIF_OUT - Sony/Philips Digital Interface, Output, Pin 48
EAPD - External Amplifier Powerdown, Output, Pin 47
This signal is the voltage reference used internal to the CS4299. A 0.1 µF and a 1.0 µF (must not be
larger than 1 µF) capacitor with short, wide traces must be connected to this pin. No other connections
should be made to this pin.
All analog inputs and outputs are centered around Vrefout, nominally 2.3 Volts. This pin may be used to
level shift external circuitry. This pin cannot drive any DC loads, thus any external loading must be
buffered.
This pin needs a 1000 pF NPO capacitor connected to analog ground.
This pin needs a 1000 pF NPO capacitor connected to analog ground.
A 1000 pF capacitor must be connected between FLTI and FLTO if the 3D function is used.
A 0.01 µF capacitor must be connected from this pin to AGND if the 3D function is used.
This pin is the configuration control for the PC_BEEP bypass path. If this pin is grounded, the bypass
path is disabled. If this pin is left floating, the PC_BEEP bypass path is enabled.
This pin generates the S/PDIF digital output from the CS4299 when the SPEN bit in the S/PDIF Control
Register (Index 68h) is ‘set’. This output may be used to directly drive a resistive divider and coupling
transformer to an RCA-type connector for use with consumer audio equipment.
This pin is used to control the powerdown state of an audio amplifier external to the CS4299. The
output is controlled by the EAPD bit in the Powerdown Ctrl/Stat Register (Index 26h). It is driven as a
normal CMOS output and defaults low (‘0’) upon power-up.
CS4299
CS4299
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