CS8421-DZZR Cirrus Logic Inc, CS8421-DZZR Datasheet - Page 11

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CS8421-DZZR

Manufacturer Part Number
CS8421-DZZR
Description
IC,Digital Audio Sample Rate Converter,CMOS,TSSOP,20PIN
Manufacturer
Cirrus Logic Inc
Datasheets
DS641PP1
1 kΩ
* When no external master clock is supplied to the part, both input and output must be set to salve mode
for the part to operate properly. This is done by connecting the MS_SEL pin to ground through a resis-
tance of 0Ω to 1 kΩ ± 1% as stated in Table 1, “Serial Audio Port Master/Slave and Clock Ratio Select
Startup Options (MS_SEL),” on page 13
** The connection (VL or GND) and value of these two resistors determines the mode of operation for the
input and output serial ports as described in Table 1, “Serial Audio Port Master/Slave and Clock Ratio
Select Startup Options (MS_SEL)", Table 2, “Serial Audio Input Port Startup Options (SAIF)", and
Table 3, “Serial Audio Output Port Startup Options (SAOF)", all on page 13.
*
Hardware Control
Settings
Figure 6. Typical Connection Diagram, No External Master Clock
Source
**
0.1 µF
Serial
Audio
ILRCK
ISCLK
SDIN
TDM_IN
MS_SEL
SAIF
SAOF
SRC_UNLOCK
BYPASS
RST
+2.5 V
VD
GND
CS8421
GND
VL
SDOUT
OLRCK
+3.3 V or +5.0 V
OSCLK
XTI
CS8421
0.1 µF
Device
Serial
Audio
Input
11

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