CY7C026A-20AXC Cypress Semiconductor Corp, CY7C026A-20AXC Datasheet
CY7C026A-20AXC
Specifications of CY7C026A-20AXC
CY7C026A-20AXC
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CY7C026A-20AXC Summary of contents
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... CY7C026A16K x 16 Dual-Port Static RAM Features True dual-ported memory cells that allow simultaneous access ■ of the same memory location 16K x 16 organization (CY7C026A) ■ 0.35 micron CMOS for optimum speed and power ■ High speed access: 15, and 20 ns ■ Low operating power ■ ...
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... Data Retention Mode ........................................................ 9 Timing ................................................................................ 9 Switching Waveforms .................................................... 10 Ordering Information ...................................................... 17 16K x16 Asynchronous Dual-Port SRAM .................. 17 Ordering Code Definition ........................................... 17 Package Diagram ............................................................ 18 Acronyms ........................................................................ 18 Document Conventions ................................................. 18 Units of Measure ....................................................... 18 Document History Page ................................................. 19 Sales, Solutions, and Legal Information ...................... 20 Worldwide Sales and Design Support ....................... 20 Products .................................................................... 20 PSoC Solutions ......................................................... 20 CY7C026A Page [+] Feedback [+] Feedback ...
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... Selection Guide Parameter Maximum access time Typical operating current Typical standby current for I (Both ports TTL level) SB1 Typical standby current for I (Both ports CMOS level) SB3 Document #: 38-06046 Rev. *F Figure 1. 100-Pin TQFP (Top View CY7C026A (16K x 16 CY7C026A 0.05 CY7C026A ...
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... CC GND NC Architecture The CY7C026A consist of an array of 16K words of 16 bits each of dual-port RAM cells, I/O and address lines, and control signals (CE, OE, R/W). These control pins permit independent access for reads or writes to any location in memory. To handle simulta- neous writes/reads to the same location, a BUSY pin is provided on each port ...
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... BUSY line is an output. BUSY can then be used to send the arbitration outcome to a slave. Semaphore Operation The CY7C026A provides eight semaphore latches, which are separate from the dual-port memory locations. Semaphores are used to reserve resources that are shared between the two ports. ...
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... MHz 5 CY7C026A [5] .......................................–0 7.0 V Ambient Temperature V CC 5V 10 +70 C 5V 10% – +85 C CY7C026A -20 Unit Max Min Typ Max – 2.4 – 0.4 – 0.4 – 2.2 – 0.8 0.8 10 –10 10 285 – 180 275 mA 305 – ...
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... TH OUTPUT 1 (b) Thévenin Equivalent (Load 1) ALL INPUT PULSES 3.0V 90% 90% 10% 10% GND Capacitance (pF) Load Derating Curve CY7C026A 893 OUTPUT 347 (c) Three-State Delay (Load 2) (Used for & HZWE LZWE including scope and jig) Page [+] Feedback ...
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... Document #: 38-06046 Rev. *F [8] Description Min 15 – 3 – – 3 – 3 – 0 – – – 3 – – is less than t and t HZCE LZCE HZOE Figure CY7C026A CY7C026A -15 -20 Unit Max Min Max – 20 – – – 3 – – – – 3 – – – ...
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... SPS t SEM address access time SAA Data Retention Mode The CY7C026A is designed with battery backup in mind. Data retention voltage and supply current are guaranteed over temperature. The following rules ensure data retention: 1. Chip Enable (CE) must be held HIGH during data retention, within – ...
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... Document #: 38-06046 Rev DATA VALID t ACE t DOE t LZOE t LZCE [18, 20, 21, 22 LZCE t ABE t ACE t LZCE . This waveform cannot be used for semaphore reads access semaphore SEM = CY7C026A [18, 19, 20] t OHA [18, 21, 22] t HZCE t HZOE DATA VALID OHA t HZCE t HZCE Page [+] Feedback [+] Feedback ...
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... If the CE or SEM LOW transition occurs simultaneously with or after the R/W LOW transition, the outputs remain in the high impedance state. Document #: 38-06046 Rev [26] t PWE [29] t HZWE SCE LOW CE or SEM and a LOW PWE . CY7C026A [23, 24, 25, 26] [29] t HZOE LZWE NOTE [23, 24, 25, 31 allow the I/O drivers to turn off and data HZWE SD Page [+] Feedback [+] Feedback ...
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... SPS Document #: 38-06046 Rev SAA VALID ADRESS SCE SOP t SD DATA VALID PWE t SWRD t SOP WRITE CYCLE READ CYCLE MATCH t SPS MATCH = CE = HIGH CY7C026A [32] t OHA t ACE DATA VALID OUT t DOE [33, 34, 35] Page [+] Feedback [+] Feedback ...
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... Figure 10. Timing Diagram of Read with BUSY (M/S = HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Figure 11. Write Timing with Busy Input (M/S = LOW) R/W BUSY Note 36 LOW Document #: 38-06046 Rev MATCH t PWE t SD VALID MATCH t BLA t WDD t PWE CY7C026A [36 BHA t BDD t DDD VALID Page [+] Feedback [+] Feedback ...
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... BUSY is asserted. PS Document #: 38-06046 Rev. *F ADDRESS MATCH BLC ADDRESS MATCH BLC ADDRESS MISMATCH t t BLA BHA ADDRESS MISMATCH t t BLA BHA CY7C026A [37] t BHC t BHC [37] Page [+] Feedback [+] Feedback ...
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... R 39 depends on which enable pin (CE INS INR L Document #: 38-06046 Rev. *F Figure 14. Interrupt Timing Diagrams t WC WRITE 3FFF [38 [39] t INR t WC WRITE 3FFE [38 [39] t INR ) is deasserted first R asserted last. L CY7C026A t RC READ 3FFF t RC READ 3FFE Page [+] Feedback [+] Feedback ...
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... Right port has semaphore token 1 1 Semaphore free 0 1 Left port has semaphore token 1 1 Semaphore free CY7C026A I/O –I/O Operation 0 7 Deselected: Power-down Deselected: Power-down Write to upper byte only Write to lower byte only Write to both bytes Read upper byte only ...
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... Ordering Information 16K x16 Asynchronous Dual-Port SRAM Speed (ns) Ordering Code 15 CY7C026A-15AXI 20 CY7C026A-20AC CY7C026A-20AXC Ordering Code Definition CY7C 026A XX A Document #: 38-06046 Rev. *F Package Name Package Type A100 100-Pin Pb-free Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Pb-free Thin Quad Flat Pack ...
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... SRAM static random access memory Document #: 38-06046 Rev. *F 51-85048 *D Document Conventions Units of Measure Symbol Unit of Measure ns nano seconds V Volts µA micro Amperes mA milli Amperes Ohms mV milli Volts MHz Mega Hertz pF pico Farad W Watts °C degree Celcius CY7C026A Page [+] Feedback [+] Feedback ...
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... Power up requirements added to Maximum Ratings Information See ECN Removed cross information from features section See ECN Added Pb-free Logo Added Pb-free parts to ordering information: CY7C026A-15AXC, CY7C026A-20AXC 12/17/08 Added CY7C026B part Added CY7C026A-15AXI part in the Ordering Information table 03/19/10 Removed inactive parts from ordering information table ...
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... Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-06046 Rev. *F All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised November 10, 2010 CY7C026A PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...