CY7C027V-15AXC Cypress Semiconductor Corp, CY7C027V-15AXC Datasheet - Page 12
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CY7C027V-15AXC
Manufacturer Part Number
CY7C027V-15AXC
Description
IC,SRAM,32KX16,CMOS,QFP,100PIN,PLASTIC
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C027V-15AXC.pdf
(22 pages)
Specifications of CY7C027V-15AXC
Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
512K (32K x 16)
Speed
15ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
428-1754
CY7C027V-15AXC
CY7C027V-15AXC
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C027V-15AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
135
Company:
Part Number:
CY7C027V-15AXC
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Company:
Part Number:
CY7C027V-15AXCT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Switching Waveforms
Document #: 38-06078 Rev. *D
Notes
37. CE = HIGH for the duration of the above timing (both write and read cycle).
38. I/O
39. Semaphores are reset (available to both ports) at cycle start.
40. If t
A
A
A
0R
SPS
0L
0R
0
SEM
SEM
–A
SEM
R/W
R/W
I/O
R/W
–A
–A
= I/O
OE
is violated, the semaphore is definitely obtained by one side or the other, but which side gets the semaphore is unpredictable.
2
2L
0
2R
R
L
R
0L
L
= LOW (request semaphore); CE
t
SA
Figure 10. Timing Diagram of Semaphore Contention
Figure 9. Semaphore Read After Write Timing, Either Side
(continued)
VALID ADRESS
t
AW
R
= CE
WRITE CYCLE
t
t
PWE
SCE
L
t
SD
= HIGH.
DATA
t
MATCH
SPS
MATCH
t
IN
HA
VALID
t
HD
t
SWRD
t
SOP
t
SOP
READ CYCLE
t
SAA
VALID ADRESS
t
DOE
t
ACE
[38, 39, 40]
CY7C027V/027AV/028V
[37]
DATA
OUT
CY7C037AV/038V
VALID
t
OHA
Page 12 of 22
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