CY7C0831AV-133BBXI Cypress Semiconductor Corp, CY7C0831AV-133BBXI Datasheet - Page 23

• Manufacturer Part Number: CY7C0831AV-133BBXI
• Description: CY7C0831AV-133BBXI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C0831AV-133BBXI

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Synchronous
• Memory Size: 2M (128K x 18)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Table 7. Read/Write and Enable Operation (Any Port)
Notes
Document #: 38-06059 Rev. *S
54. CE
55. Address “7FFFF” is the mailbox location for R_Port of the 9Mb device.
56. L_Port is configured for Write operation, and R_Port is configured for Read operation.
57. At least one byte enable (BE0 – BE1) is required to be active during interrupt operations.
58. Interrupt flag is set with respect to the rising edge of the Write clock, and is reset with respect to the rising edge of the Read clock.
59. OE is an asynchronous input signal.
60. When CE changes state, deselection and Read happen after one cycle of latency.
61. CE
CLK
L_PORT
ADDRESS
INT
CLK
R_PORT
ADDRESS
OE
X
X
X
H
L
0
0
R
= OE = ADS = CNTEN = LOW; CE
= OE = LOW; CE
L
R
CLK
X
1
= R/W = HIGH.
t
CH2
t
CH2
t
CYC2
Inputs
t
CYC2
CE
t
(continued)
CL2
H
X
L
L
L
1
t
t
0
7FFFF
= CNTRST = MRST = CNT/MSK = HIGH.
SA
CL2
t
Figure 19. MailBox Interrupt Timing
SA
A
t
HA
m
t
t
HA
SINT
CE
X
H
H
H
L
1
A
n
A
[2, 17, 59, 60, 61]
R/W
m+1
H
X
X
L
X
A
n+1
7FFFF
DQ
Outputs
High-Z
High-Z
High-Z
D
0
[54, 55, 56, 57, 58]
D
OUT
– DQ
IN
t
RINT
17
CY7C0832BV, CY7C0833AV
CY7C0837AV, CY7C0830AV
CY7C0831AV, CY7C0832AV
A
n+2
A
Deselected
Deselected
Write
Read
Outputs Disabled
m+3
Operation
A
n+3
A
m+4
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