CY7C1470BV33-167AXI Cypress Semiconductor Corp, CY7C1470BV33-167AXI Datasheet - Page 18
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CY7C1470BV33-167AXI
Manufacturer Part Number
CY7C1470BV33-167AXI
Description
CY7C1470BV33-167AXI
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1470BV33-167AXI.pdf
(31 pages)
Specifications of CY7C1470BV33-167AXI
Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
72M (2M x 36)
Speed
167MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1470BV33-167AXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
135
Company:
Part Number:
CY7C1470BV33-167AXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Table 5. Identification Register Definitions
Table 6. Scan Register Sizes
Table 7. Identification Codes
Note
Document #: 001-15031 Rev. *G
Revision Number (31:29)
Device Depth (28:24)
Architecture/Memory
Type(23:18)
Bus Width/Density(17:12)
Cypress JEDEC ID Code
(11:1)
ID Register Presence
Indicator (0)
Instruction
Bypass
ID
Boundary Scan Order – 165 FBGA
Boundary Scan Order – 209 FBGA
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD
RESERVED
12. Bit #24 is “1” in the ID Register Definitions for both 2.5V and 3.3V versions of this device.
Instruction Field
Instruction
Register Name
[12]
Code
CY7C1470BV33
000
001
010
100
101
011
00000110100
(2M x 36)
001000
100100
01011
000
1
Loads the ID register with the vendor ID code and places the register between TDI
Do Not Use: This instruction is reserved for future use.
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM outputs to High Z state. This instruction is not 1149.1 compliant.
and TDO. This operation does not affect SRAM operations.
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High Z state.
Captures IO ring contents. Places the boundary scan register between TDI and TDO.
Does not affect SRAM operation. This instruction does not implement 1149.1 preload
function and is therefore not 1149.1 compliant.
Do Not Use: This instruction is reserved for future use.
Bit Size (x36)
32
71
CY7C1472BV33
3
1
-
00000110100
(4M x 18)
010100
001000
01011
000
1
CY7C1474BV33
Bit Size (x18)
00000110100
(1M x 72)
CY7C1472BV33, CY7C1474BV33
001000
110100
01011
Description
000
32
52
3
1
-
1
Describes the version number
Reserved for internal use
Defines memory type and archi-
tecture
Defines width and density
SRAM vendor
Indicates the presence of an ID
register
Enables unique identification of
Description
Bit Size (x72)
CY7C1470BV33
110
32
3
1
-
Page 18 of 31
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