CY7C192-15VXC Cypress Semiconductor Corp, CY7C192-15VXC Datasheet

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CY7C192-15VXC

Manufacturer Part Number
CY7C192-15VXC
Description
CY7C192-15VXC
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C192-15VXC

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
256K (64K x 4)
Speed
15ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOJ
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C192-15VXC
Manufacturer:
CY
Quantity:
1 241
64 K × 4 Static RAM with Separate IO
Features
Cypress Semiconductor Corporation
Document #: 38-05047 Rev. *G
Logic Block Diagram
High speed
CMOS for optimum speed/power
Low active power
Low standby power
TTL-compatible inputs and outputs
Automatic power down when deselected
Available in Pb-free and non Pb-free 28-pin Molded SOJ
package
15 ns
860 mW
55 mW
A
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
9
INPUT BUFFER
DECODER
COLUMN
198 Champion Court
64K x 4
ARRAY
64 K × 4 Static RAM with Separate IO
POWER
DOWN
Functional Description
The CY7C192 is a high performance CMOS static RAM
organized as 65,536 × 4 bits with separate IO. Easy memory
expansion is provided by active LOW Chip Enable (CE) and
tri-state drivers. It has an automatic power down feature that
reduces power consumption by 75% when deselected.
Writing to the device is accomplished when the Chip Enable (CE)
and Write Enable (WE) inputs are both LOW.
Data on the four input pins (I
memory location specified on the address pins (A
Reading the device is accomplished by taking the Chip Enable
(CE) LOW while the Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location specified
on the address pins appears on the four data output pins.
The output pins stay in high impedance state when Write Enable
(WE) is LOW or Chip Enable (CE) is HIGH.
A die coat ensures alpha immunity.
San Jose
I
I
I
I
O
O
O
O
CE
WE
0
1
2
3
0
1
2
3
,
CA 95134-1709
0
through I
Revised April 6, 2011
3
) is written into the
CY7C192
0
408-943-2600
through A
15
).
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CY7C192-15VXC Summary of contents

Page 1

... Document #: 38-05047 Rev × 4 Static RAM with Separate IO Functional Description The CY7C192 is a high performance CMOS static RAM organized as 65,536 × 4 bits with separate IO. Easy memory expansion is provided by active LOW Chip Enable (CE) and tri-state drivers. It has an automatic power down feature that reduces power consumption by 75% when deselected ...

Page 2

... Switching Characteristics ................................................ 5 Switching Waveforms ...................................................... 6 Typical DC and AC Characteristics ................................ 8 Ordering Information ........................................................ 9 Ordering Code Definitions ........................................... 9 Document #: 38-05047 Rev. *G Package Diagram .............................................................. 9 Acronyms ........................................................................ 10 Document Conventions ................................................. 10 Units of Measure ....................................................... 10 Document History Page ................................................. 11 Sales, Solutions, and Legal Information ...................... 12 Worldwide Sales and Design Support ....................... 12 Products .................................................................... 12 PSoC Solutions ......................................................... 12 CY7C192 Page [+] Feedback ...

Page 3

... Pin Configuration Selection Guide Description Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current Document #: 38-05047 Rev. *G Figure 1. 28-pin Molded SOJ Package Top View GND 15 WE -15 15 145 10 CY7C192 Unit Page [+] Feedback ...

Page 4

... OUT MAX RC Max > > < MAX  0.3 V, Max >  0 > V < 0 Test Conditions ° MHz 5 CY7C192 + 0 Ambient V [2] CC Temperature 5 V  10% 0 °C to +70 °C -15 Min Max Unit 2.4 – V – 0 0.5 0.8 V 5 A +5 5 A +5 – 145 ...

Page 5

... These parameters are guaranteed by design and LZCE HZW\E LZWE 2. Transition is measured 500 mV from steady-state voltage. Figure CY7C192 ALL INPUT PULSES 90% 90% 10% 10% < THÉ VENIN EQUIVALENT 167 1.73 V -15 Min Max ...

Page 6

... HIGH. The data input setup and hold timing must be referenced to the rising edge of the signal that terminates the write. Document #: 38-05047 Rev. *G [8, 9] Figure 3. Read Cycle No OHA [8, 10] Figure 4. Read Cycle No DATA VALID SCE PWE t SD DATA VALID t HZWE CY7C192 DATA VALID t HZCE HIGH IMPEDANCE t PD ICC 50% ISB [11 LZWE HIGH IMPEDANCE Page [+] Feedback ...

Page 7

... HIGH. The data input setup and hold timing must be referenced to the rising edge of the signal that terminates the write. 13 goes HIGH simultaneously with WE HIGH, the output remains in a high impedance state. Document #: 38-05047 Rev SCE PWE t SD DATA VALID t HZWE CY7C192 [12, 13 HIGH IMPEDANCE Page [+] Feedback ...

Page 8

... TYPICAL ACCESS TIME CHANGE vs. OUTPUT LOADING 30.0 25.0 20.0 15.0 V =4.5V 10 =25C A 5.0 0.0 0 200 400 600 800 1000 CAPACITANCE (pF) CY7C192 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 V =5. =25 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs ...

Page 9

... Ordering Information Speed (ns) Ordering Code Package Diagram 15 CY7C192-15VXC Ordering Code Definitions Package Diagram Figure 7. 28-pin (300-Mil) Molded SOJ, 51-85031 Document #: 38-05047 Rev. *G Package Type 51-85031 28-pin Molded SOJ (Pb-free) Temperature Range Commercial Package Type 28-pin Molded SOJ (Pb-free) Speed 256-Kbit density with datawidth × 4 bits ...

Page 10

... Document #: 38-05047 Rev. *G Document Conventions Units of Measure Symbol Unit of Measure  ohms ns nano seconds V Volts µA micro Amperes mA milli Amperes mm milli meter ms milli seconds MHz Mega Hertz pF pico Farad mW milli Watts W Watts % percent °C degree Celcius CY7C192 Page [+] Feedback ...

Page 11

... Document History Page Document Title: CY7C192 64 K × 4 Static RAM with Separate IO Document Number: 38-05047 Orig. of REV. ECN NO. Issue Date Change ** 107149 09/10/01 *A 359716 See ECN *B 419549 See ECN *C 492500 See ECN *D 2104606 See ECN VKN/AESA Removed 12 ns speed bin *E 2956606 ...

Page 12

... Cypress against all charges. Use may be limited by and subject to the applicable Cypress software license agreement. Document #: 38-05047 Rev. *G All products and company names mentioned in this document may be the trademarks of their respective holders. cypress.com/go/plc Revised April 6, 2011 CY7C192 PSoC Solutions psoc.cypress.com/solutions PSoC 1 | PSoC 3 ...

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