DAC8043FSZ Analog Devices Inc, DAC8043FSZ Datasheet - Page 14

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DAC8043FSZ

Manufacturer Part Number
DAC8043FSZ
Description
12 BIT SERIAL INPUT DAC
Manufacturer
Analog Devices Inc
Datasheet

Specifications of DAC8043FSZ

Settling Time
250ns
Number Of Bits
12
Data Interface
Serial
Number Of Converters
1
Voltage Supply Source
Single Supply
Power Dissipation (max)
500µW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DAC8043FSZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
DAC8043
INTERFACING TO THE MC6800
As shown in Figure 20, the DAC8043 may be interfaced to the
MC6800 by successively executing memory write instructions
while manipulating the data between writes, so that each write
presents the next bit.
In this example, the most significant bits are found in the 0000
and 0001 memory locations. The four MSBs are found in the
lower half of 0000 and the eight LSBs in 0001. The data is taken
from the DB
The serial data loading is triggered by the CLK pulse, which
is asserted by a decoded memory write to the 2000 memory
location, R/ W , and Φ2. A write to address location 4000
transfers data from the input register to the DAC register.
DAC8043 INTERFACE TO THE 8085
The interface of the DAC8043 to the 8085 microprocessor
is shown in Figure 21. Note that the SOD line of the micro-
processor is used to present data serially to the DAC.
Data is clocked into the DAC8043 by executing memory write
instructions. The clock input is generated by decoding Address
8000 and WR . Data is loaded into the DAC register with a
memory write instruction to Address A000.
*ANALOG CIRCUITRY OMITTED
FOR SIMPLICITY.
MC6800
7
line.
Figure 20. DAC8043 to MC6800 Interface
DB
DB
A
A
15
0
0
7
R/W
Φ2
16-BIT DATA BUS
8-BIT DATA BUS
E
E
E
SRI
1
3
2
LD
A
DAC8043*
ADDRESS
DECODER
0
74LS138
CLK
A
2
Rev. E | Page 14 of 16
Serial data supplied to the DAC8043 must be present in
the right-justified format in Register H and Register L of the
microprocessor.
DAC8043 TO THE 68000 INTERFACE
The interface of the DAC8043 to the 68000 microprocessor is
shown in Figure 22. Serial data to the DAC is taken from one
of the microprocessor’s data bus lines.
PROCESSOR
MICRO-
68000
*ANALOG CIRCUITRY OMITTED FOR
SIMPLICITY.
DB
Figure 22. DAC8043 to 68000 Microprocessor Interface
VMA
UDS
8085
VPA
DB
A
AS
A
23
15
1
0
1/4 74HC125
SOD
ALE
AD
AD
WR
A
A
Figure 21. DAC8043 to 8085 Interface
15
CS
0
0
7
*ANALOG CIRCUITRY OMITTED FOR SIMPLICITY.
ADDRESS BUS
(8)
(8)
ADDRESS
DATA BUS
DECODE
8212
ADDRESS BUS (16)
5V
DATA
E
E
E
SRI
1
3
2
+
LD
SRI
DECODER
DAC8043*
ADDRESS
A
74LS138
0
CLK
DAC8043*
A
CLK
2
LD

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