DSPIC33EP512MU810-I/PF Microchip Technology, DSPIC33EP512MU810-I/PF Datasheet - Page 368

• Manufacturer Part Number: DSPIC33EP512MU810-I/PF
• Description: 100 PINS, 512KB Flash, 52KB RAM, 60 MHz, USB, 2xCAN, 15 DMA 100 TQFP 14x14x1mm T
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33EPr

Specifications of DSPIC33EP512MU810-I/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 60 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, QEI, SPI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 83
• Program Memory Size: 512KB (170K x 24)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 24K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 32x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-TQFP
• Rohs Compliant: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33EPXXXMU806/810/814 and PIC24EPXXXGU810/814
REGISTER 22-14: UxIR: USB INTERRUPT STATUS REGISTER (DEVICE MODE ONLY)
DS70616E-page 368
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/K-0, HS
STALLIF
U-0
—
Unimplemented: Read as ‘0’
STALLIF: STALL Handshake Interrupt bit
1 = A STALL handshake was sent by the peripheral during the handshake phase of the transaction in
0 = A STALL handshake has not been sent
Unimplemented: Read as ‘0’
RESUMEIF: Resume Interrupt bit
1 = A K-State is observed on the D+ or D- pin for 2.5 s (differential ‘1’ for low-speed, differential ‘0’ for
0 = No K-State observed
IDLEIF: Idle Detect Interrupt bit
1 = Idle condition detected (constant Idle state of 3 ms or more)
0 = No Idle condition detected
TRNIF: Token Processing Complete Interrupt bit
1 = Processing of current token is complete; read UxSTAT register for endpoint BDT information
0 = Processing of current token not complete; clear UxSTAT register or load next token from STAT
SOFIF: Start of Frame Token Interrupt bit
1 = A Start of Frame token was received by the peripheral
0 = A Start of Frame token has not been received by the peripheral
UERRIF: USB Error Condition Interrupt bit (read-only)
1 = An unmasked error condition has occurred; only error states enabled in the UxEIE register can set
0 = No unmasked error condition has occurred
URSTIF: USB Reset Interrupt bit
1 = Valid USB Reset has occurred for at least 2.5 s; Reset state must be cleared before this bit can
0 = No USB Reset has occurred
Device mode
full-speed)
(Clearing this bit causes the STAT FIFO to advance.)
this bit
be reasserted
U-0
U-0
—
—
U = Unimplemented bit, read as ‘0’
K = Write ‘1’ to clear bit
‘1’ = Bit is set
RESUMEIF
R/K-0, HS
U-0
—
R/K-0, HS
IDLEIF
U-0
—
Preliminary
HS = Hardware Settable bit
‘0’ = Bit is cleared
R/K-0, HS
TRNIF
U-0
—
R/K-0, HS
SOFIF
U-0
—
 2009-2011 Microchip Technology Inc.
x = Bit is unknown
UERRIF
U-0
R-0
—
R/K-0, HS
URSTIF
U-0
—
bit 8
bit 0