DSPIC33FJ128MC804-H/ML Microchip Technology, DSPIC33FJ128MC804-H/ML Datasheet - Page 269

• Manufacturer Part Number: DSPIC33FJ128MC804-H/ML
• Description: 16-bit DSC, 128KB Flash, Motor, CAN, DMA, 40 MIPS, NanoWatt 44 QFN 8x8x0.9mm TUB
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC804-H/ML

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 9x10b/12b, D/A 6x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 140°C
• Package / Case: 44-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.4
ECAN Message Buffers are part of DMA RAM Memory.
They are not ECAN special function registers. The user
application must directly write into the DMA RAM area
that is configured for ECAN Message Buffers. The
location and size of the buffer area is defined by the
user application.
BUFFER 21-1:
BUFFER 21-2:
© 2011 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-2
bit 1
bit 0
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-0
dsPIC33FJ32MC302/304, dsPIC33FJ64MCX02/X04 AND dsPIC33FJ128MCX02/X04
R/W-x
R/W-x
EID13
SID5
U-0
U-0
—
—
ECAN Message Buffers
Unimplemented: Read as ‘0’
SID<10:0>: Standard Identifier bits
SRR: Substitute Remote Request bit
1 = Message will request remote transmission
0 = Normal message
IDE: Extended Identifier bit
1 = Message will transmit extended identifier
0 = Message will transmit standard identifier
Unimplemented: Read as ‘0’
EID<17:6>: Extended Identifier bits
R/W-x
R/W-x
EID12
SID4
U-0
U-0
—
—
ECAN™ MESSAGE BUFFER WORD 0
ECAN™ MESSAGE BUFFER WORD 1
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
R/W-x
R/W-x
EID11
SID3
U-0
U-0
—
—
R/W-x
SID10
R/W-x
R/W-x
EID10
SID2
U-0
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-x
R/W-x
R/W-x
EID17
R/W-x
SID9
SID1
EID9
R/W-x
R/W-x
R/W-x
EID16
R/W-x
SID8
EID8
SID0
x = Bit is unknown
x = Bit is unknown
R/W-x
R/W-x
R/W-x
EID15
R/W-x
SID7
EID7
SRR
DS70291E-page 269
R/W-x
R/W-x
R/W-x
EID14
R/W-x
SID6
EID6
IDE
bit 8
bit 0
bit 8
bit 0