DSPIC33FJ16GS502-E/MM Microchip Technology, DSPIC33FJ16GS502-E/MM Datasheet - Page 234
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DSPIC33FJ16GS502-E/MM
Manufacturer Part Number
DSPIC33FJ16GS502-E/MM
Description
16 Bit MCU/DSP 40MIPS 16 KB FLASH SMPS 28 QFN-S 6x6mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ06GS101-ISO.pdf
(346 pages)
2.DSPIC33FJ06GS101-ISO.pdf
(18 pages)
3.DSPIC33FJ06GS101-ISO.pdf
(16 pages)
Specifications of DSPIC33FJ16GS502-E/MM
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ16GS502-E/MM
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
- DSPIC33FJ06GS101-ISO PDF datasheet
- DSPIC33FJ06GS101-ISO PDF datasheet #2
- DSPIC33FJ06GS101-ISO PDF datasheet #3
- Current page: 234 of 346
- Download datasheet (6Mb)
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
REGISTER 18-1:
DS70318D-page 232
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12
bit 11
bit 10
bit 9-8
bit 7
bit 6
bit 5
bit 4
UARTEN
R/W-0 HC
Note 1: Refer to Section 17. “UART” (DS70188) in the “dsPIC33F Family Reference Manual” for information on
R/W-0
WAKE
2: This feature is only available for the 16x BRG mode (BRGH = 0).
(1)
enabling the UART module for receive or transmit operation.
UARTEN: UARTx Enable bit
1 = UARTx is enabled; all UARTx pins are controlled by UARTx as defined by UEN<1:0>
0 = UARTx is disabled; all UARTx pins are controlled by port latches; UARTx power consumption minimal
Unimplemented: Read as ‘0’
USIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
IREN: IrDA
1 = IrDA
0 = IrDA
RTSMD: Mode Selection for UxRTS Pin bit
1 = UxRTS pin in Simplex mode
0 = UxRTS pin in Flow Control mode
Unimplemented: Read as ‘0’
UEN<1:0>: UARTx Enable bits
11 = UxTX, UxRX and BCLK pins are enabled and used; UxCTS pin controlled by port latches
10 = UxTX, UxRX, UxCTS and UxRTS pins are enabled and used
01 = UxTX, UxRX and UxRTS pins are enabled and used; UxCTS pin controlled by port latches
00 = UxTX and UxRX pins are enabled and used; UxCTS and UxRTS/BCLK pins controlled by
WAKE: Wake-up on Start bit Detect During Sleep Mode Enable bit
1 = UARTx will continue to sample the UxRX pin; interrupt generated on falling edge; bit cleared
0 = No wake-up enabled
LPBACK: UARTx Loopback Mode Select bit
1 = Enable Loopback mode
0 = Loopback mode is disabled
ABAUD: Auto-Baud Enable bit
1 = Enable baud rate measurement on the next character – requires reception of a Sync field (55h)
0 = Baud rate measurement disabled or completed
URXINV: Receive Polarity Inversion bit
1 = UxRX Idle state is ‘0’
0 = UxRX Idle state is ‘1’
LPBACK
R/W-0
in hardware on following rising edge
before other data; cleared in hardware upon completion
U-0
—
UxMODE: UART
port latches
®
®
encoder and decoder enabled
encoder and decoder disabled
®
Encoder and Decoder Enable bit
HC = Hardware Clearable
W = Writable bit
‘1’ = Bit is set
R/W-0, HC
ABAUD
USIDL
R/W-0
x
MODE REGISTER
(1)
URXINV
IREN
R/W-0
R/W-0
Preliminary
(2)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
RTSMD
(2)
BRGH
R/W-0
R/W-0
R/W-0
U-0
—
PDSEL<1:0>
© 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
R/W-0
UEN<1:0>
STSEL
R/W-0
R/W-0
bit 8
bit 0
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