DSPIC33FJ16GS504T-I/PT Microchip Technology, DSPIC33FJ16GS504T-I/PT Datasheet - Page 115
DSPIC33FJ16GS504T-I/PT
Manufacturer Part Number
DSPIC33FJ16GS504T-I/PT
Description
16 Bit MCU/DSP 40MIPS 16 KB FLASH SMPS 44 TQFP 10x10x1mm T/R
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.DSPIC33FJ06GS101-ISO.pdf
(346 pages)
2.DSPIC33FJ06GS101-ISO.pdf
(18 pages)
3.DSPIC33FJ06GS101-ISO.pdf
(16 pages)
Specifications of DSPIC33FJ16GS504T-I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 12x10b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ16GS504T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- DSPIC33FJ06GS101-ISO PDF datasheet
- DSPIC33FJ06GS101-ISO PDF datasheet #2
- DSPIC33FJ06GS101-ISO PDF datasheet #3
- Current page: 115 of 346
- Download datasheet (6Mb)
REGISTER 7-13:
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12-5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1: This bit is not implemented in dsPIC33FJ06GS101/102 and dsPIC33FJ16GS402/404 devices.
U-0
U-0
—
—
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
Unimplemented: Read as ‘0’
INT2IE: External Interrupt 2 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
INT1IE: External Interrupt 1 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
CNIE: Input Change Notification Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
AC1IE: Analog Comparator 1 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
MI2C1IE: I2C1 Master Events Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SI2C1IE: I2C1 Slave Events Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
U-0
U-0
—
—
IEC1: INTERRUPT ENABLE CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
INT2IE
R/W-0
U-0
—
INT1IE
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
CNIE
U-0
—
(1)
AC1IE
R/W-0
U-0
—
(1)
x = Bit is unknown
MI2C1IE
R/W-0
U-0
—
DS70318D-page 113
SI2C1IE
R/W-0
U-0
—
bit 8
bit 0
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