DSPIC33FJ16MC102-E/SO Microchip Technology, DSPIC33FJ16MC102-E/SO Datasheet - Page 232
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DSPIC33FJ16MC102-E/SO
Manufacturer Part Number
DSPIC33FJ16MC102-E/SO
Description
16-bit Motor Control DSC Family, 16 MIPS, 16KB Flash, 1KB RAM 28 SOIC .300in TUB
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet
1.DSPIC33FJ16GP101-IP.pdf
(322 pages)
Specifications of DSPIC33FJ16MC102-E/SO
Processor Series
dsPIC33F
Core
dsPIC
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Interface Type
SPI, I2C, UART, JTAG
Number Of Programmable I/os
35
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 125 C
Development Tools By Supplier
MPLAB IDE Software
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 13 Channel
Core Processor
dsPIC
Core Size
16-Bit
Speed
16 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, POR, PWM, WDT
Number Of I /o
21
Eeprom Size
-
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-SOIC (0.295", 7.50mm Width)
Lead Free Status / Rohs Status
Details
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dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
23.2
All
dsPIC33FJ16MC101/102 devices power their core dig-
ital logic at a nominal 2.5V. This can create a conflict for
designs that are required to operate at a higher typical
voltage, such as 3.3V. To simplify system design, all
devices
dsPIC33FJ16MC101/102 family incorporate an on-
chip regulator that allows the device to run its core logic
from V
The regulator provides power to the core from the other
V
(less than 5 ohms) capacitor (such as tantalum or
ceramic) must be connected to the V
(Figure
regulator. The recommended value for the filter capac-
itor is provided in
“DC
On a POR
voltage regulator to generate an output voltage. During
this time, designated as T
disabled. T
resumes operation after any power-down.
FIGURE 23-1:
DS70652C-page 232
Note 1:
DD
Note:
pins. When the regulator is enabled, a low-ESR
Characteristics”.
Tantalum
DD
of
2:
3:
23-1). This helps to maintain the stability of the
10
C
On-Chip Voltage Regulator
.
EFC
,
in
µF
STARTUP
it takes approximately 20 μs for the on-chip
It is important for low-ESR capacitors to
be placed as close as possible to the V
pin.
These are typical operating voltages. Refer to
Table 26-14
acteristics”
and V
It is important for low-ESR capacitors to be
placed as close as possible to the V
Typical V
V
DDMIN
the
3.3V
the
CAP
Table 26-14
.
CAP
.
is applied every time the device
dsPIC33FJ16GP101/102
dsPIC33FJ16GP101/102
CONNECTIONS FOR THE
ON-CHIP VOLTAGE
REGULATOR
located in
for the full operating ranges of V
V
V
V
pin voltage = 2.5V when V
DD
CAP
SS
dsPIC33F
STARTUP
located in
Section 26.1 “DC Char-
, code execution is
(1)
Section 26.1
CAP
CAP
DD
pin.
CAP
≥
DD
and
and
Preliminary
pin
23.3
The Brown-out Reset (BOR) module is based on an
internal voltage reference circuit that monitors the reg-
ulated supply voltage V
BOR module is to generate a device Reset when a
brown-out condition occurs. Brown-out conditions are
generally caused by glitches on the AC mains (for
example, missing portions of the AC cycle waveform
due to bad power transmission lines, or voltage sags
due to excessive current draw when a large inductive
load is turned on).
A BOR generates a Reset pulse, which resets the
device. The BOR selects the clock source, based on
the device Configuration bit values (FNOSC<2:0> and
POSCMD<1:0>).
If an oscillator mode is selected, the BOR activates the
Oscillator Start-up Timer (OST). The system clock is
held until OST expires. If the PLL is used, the clock is
held until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the PWRT time-out (TPWRT) is applied
before the internal Reset is released. If TPWRT = 0 and
a crystal oscillator is being used, then a nominal delay
of TFSCM = 100 is applied. The total delay in this case
is TFSCM.
The BOR Status bit (RCON<1>) is set to indicate that a
BOR has occurred. The BOR circuit continues to oper-
ate while in Sleep or Idle modes and resets the device
should V
DD
BOR: Brown-Out Reset
fall below the BOR threshold voltage.
CAP
© 2011 Microchip Technology Inc.
. The main purpose of the
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