DSPIC33FJ64MC506A-I/MR Microchip Technology, DSPIC33FJ64MC506A-I/MR Datasheet - Page 346
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DSPIC33FJ64MC506A-I/MR
Manufacturer Part Number
DSPIC33FJ64MC506A-I/MR
Description
16 Bit MCU/DSP 40MIPS 64KB FLASH 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ64MC506A-I/MR
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Product
DSCs
Processor Series
DSPIC33F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
dsPIC33FJXXXMCX06A/X08A/X10A
Reset
Reset Sequence.................................................................. 87
Resets ................................................................................. 81
Revision History ................................................................ 342
S
Serial Peripheral Interface (SPI) ....................................... 197
Software Simulator (MPLAB SIM)..................................... 273
Software Stack Pointer, Frame Pointer
Special Features of the CPU............................................. 255
SPI Module
Symbols Used in Opcode Descriptions............................. 264
DS70594B-page 346
IPC15 (Interrupt Priority Control 15) ......................... 129
IPC16 (Interrupt Priority Control 16) ......................... 130
IPC17 (Interrupt Priority Control 17) ......................... 131
IPC2 (Interrupt Priority Control 2) ............................. 116
IPC3 (Interrupt Priority Control 3) ............................. 117
IPC4 (Interrupt Priority Control 4) ............................. 118
IPC5 (Interrupt Priority Control 5) ............................. 119
IPC6 (Interrupt Priority Control 6) ............................. 120
IPC7 (Interrupt Priority Control 7) ............................. 121
IPC8 (Interrupt Priority Control 8) ............................. 122
IPC9 (Interrupt Priority Control 9) ............................. 123
NVMCOM (Flash Memory Control) ............................. 77
OCxCON (Output Compare x Control) ..................... 177
OSCCON (Oscillator Control) ................................... 148
OSCTUN (FRC Oscillator Tuning) ............................ 152
PLLFBD (PLL Feedback Divisor) .............................. 151
PMD1 (Peripheral Module Disable Control 1) ........... 157
PMD2 (Peripheral Module Disable Control 2) ........... 159
PMD3 (Peripheral Module Disable Control 3) ........... 161
PWMxCON1 (PWMx Control 1) ................................ 184
PWMxCON2 (PWMx Control 2) ................................ 185
PxDC1 (PWMx Duty Cycle 1) ................................... 191
PxDC2 (PWMx Duty Cycle 2) ................................... 191
PxDC3 (PWMx Duty Cycle 3) ................................... 192
PxDC4 (PWMx Duty Cycle 4) ................................... 192
PxDTCON1 (PWMx Dead-Time Control 1)............... 186
PxDTCON2 (PWMx Dead-Time Control 2)............... 187
PxFLTACON (PWMx Fault A Control) ...................... 188
PxFLTBCON (PWMx Fault B Control) ...................... 189
PxOVDCON (PWMx Override Control)..................... 190
PxSECMP (PWMx Special Event Compare) ............ 183
PxTCON (PWMx Time Base Control) ....................... 181
PxTMR (PWMx Timer Count Value) ......................... 182
PxTPER (PWMx Time Base Period)......................... 182
QEIxCON (QEIx Control) .......................................... 194
RCON (Reset Control) ................................................ 82
SPIxCON1 (SPIx Control 1) ...................................... 199
SPIxCON2 (SPIx Control 2) ...................................... 201
SPIxSTAT (SPIx Status and Control) ....................... 198
SR (CPU STATUS) ..................................................... 92
SR (CPU Status) ......................................................... 28
T1CON (Timer1 Control)........................................... 166
TxCON (T2CON, T4CON, T6CON or T8CON Control) ..
TyCON (T3CON, T5CON, T7CON or T9CON Control) ..
UxMODE (UARTx Mode) .......................................... 212
UxSTA (UARTx Status and Control) ......................... 214
Clock Source Selection ............................................... 84
Special Function Register States ................................ 86
Times .......................................................................... 84
CALL Stack Frame...................................................... 65
SPI1 Register Map ...................................................... 53
SPI2 Register Map ...................................................... 53
170
171
Preliminary
System Control
T
Temperature and Voltage Specifications
Timer1............................................................................... 165
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 167
Timing Characteristics
Timing Diagrams
Timing Requirements
Timing Specifications
Register Map .............................................................. 64
AC..................................................................... 284, 320
CLKO and I/O ........................................................... 287
10-Bit A/D Conversion (CHPS<1:0> = 01, SIMSAM = 0,
10-Bit A/D Conversion (CHPS<1:0> = 01, SIMSAM = 0,
12-Bit A/D Conversion (ASAM = 0, SSRC = 000) .... 311
CAN I/O .................................................................... 307
External Clock........................................................... 285
I2Cx Bus Data (Master Mode) .................................. 303
I2Cx Bus Data (Slave Mode) .................................... 305
I2Cx Bus Start/Stop Bits (Master Mode)................... 303
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 305
Input Capture (CAPx) ............................................... 292
Motor Control PWM .................................................. 294
Motor Control PWM Fault ......................................... 294
OC/PWM................................................................... 293
Output Compare (OCx)............................................. 292
QEA/QEB Input ........................................................ 295
QEI Module Index Pulse ........................................... 296
Reset, Watchdog Timer, Oscillator Start-up Timer and
SPIx Master Mode (CKE = 0) ................................... 298
SPIx Master Mode (CKE = 1) ................................... 299
SPIx Slave Mode (CKE = 0) ..................................... 300
SPIx Slave Mode (CKE = 1) ..................................... 301
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock .............. 290
TimerQ (QEI Module) External Clock ....................... 297
ADC Conversion (10-bit mode)................................. 325
ADC Conversion (12-bit Mode)................................. 325
CLKO and I/O ........................................................... 287
External Clock........................................................... 285
Input Capture ............................................................ 292
SPIx Master Mode (CKE = 0) ................................... 321
SPIx Module Master Mode (CKE = 1) ...................... 321
SPIx Module Slave Mode (CKE = 0) ........................ 322
SPIx Module Slave Mode (CKE = 1) ........................ 322
10-Bit A/D Conversion Requirements....................... 315
12-Bit A/D Conversion Requirements....................... 312
CAN I/O Requirements ............................................. 307
I2Cx Bus Data Requirements (Master Mode)........... 304
I2Cx Bus Data Requirements (Slave Mode)............. 306
Motor Control PWM Requirements........................... 294
Output Compare Requirements................................ 292
PLL Clock ......................................................... 286, 320
QEI External Clock Requirements ............................ 297
QEI Index Pulse Requirements ................................ 296
Quadrature Decoder Requirements.......................... 295
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
Simple OC/PWM Mode Requirements ..................... 293
SPIx Master Mode (CKE = 0) Requirements............ 298
SPIx Master Mode (CKE = 1) Requirements............ 299
ASAM = 0, SSRC<2:0> = 000)......................... 313
ASAM = 1, SSRC<2:0> = 111, SAMC<4:0> =
00001) .............................................................. 314
Power-up Timer ................................................ 288
er-up Timer and Brown-out Reset Requirements ...
289
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