DSPIC33FJ64MC706A-I/MR Microchip Technology, DSPIC33FJ64MC706A-I/MR Datasheet - Page 189
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DSPIC33FJ64MC706A-I/MR
Manufacturer Part Number
DSPIC33FJ64MC706A-I/MR
Description
16 Bit MCU/DSP 40MIPS 64KB FLASH 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Specifications of DSPIC33FJ64MC706A-I/MR
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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REGISTER 16-10: PxFLTBCON: PWMx FAULT B CONTROL REGISTER
2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
Note 1:
FBOV4H
FLTBM
R/W-0
R/W-0
Fault A pin has priority over Fault B pin, if enabled.
FBOVxH<4:1>:FBOVxL<4:1>: Fault Input B PWM Override Value bits
1 = The PWM output pin is driven active on an external Fault input event
0 = The PWM output pin is driven inactive on an external Fault input event
FLTBM: Fault B Mode bit
1 = The Fault B input pin functions in the Cycle-by-Cycle mode
0 = The Fault B input pin latches all control pins to the states programmed in FLTBCON<15:8>
Unimplemented: Read as ‘0’
FBEN4: Fault Input B Enable bit
1 = PWM4H/PWM4L pin pair is controlled by Fault Input B
0 = PWM4H/PWM4L pin pair is not controlled by Fault Input B
FBEN3: Fault Input B Enable bit
1 = PWM3H/PWM3L pin pair is controlled by Fault Input B
0 = PWM3H/PWM3L pin pair is not controlled by Fault Input B
FBEN2: Fault Input B Enable bit
1 = PWM2H/PWM2L pin pair is controlled by Fault Input B
0 = PWM2H/PWM2L pin pair is not controlled by Fault Input B
FBEN1: Fault Input B Enable bit
1 = PWM1H/PWM1L pin pair is controlled by Fault Input B
0 = PWM1H/PWM1L pin pair is not controlled by Fault Input B
FBOV4L
R/W-0
U-0
—
dsPIC33FJXXXMCX06A/X08A/X10A
W = Writable bit
‘1’ = Bit is set
FBOV3H
R/W-0
U-0
—
FBOV3L
R/W-0
(1)
(1)
(1)
(1)
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
FBEN4
FBOV2H
R/W-0
R/W-0
(1)
FBEN3
FBOV2L
R/W-0
R/W-0
(1)
x = Bit is unknown
FBEN2
FBOV1H
R/W-0
R/W-0
(1)
DS70594B-page 189
FBEN1
FBOV1L
R/W-0
R/W-0
bit 8
bit 0
(1)
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