EPF10K200SFC484-2N Altera, EPF10K200SFC484-2N Datasheet - Page 46
EPF10K200SFC484-2N
Manufacturer Part Number
EPF10K200SFC484-2N
Description
FLEX 10KE
Manufacturer
Altera
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet
46
Figure 20
Figure 20. FLEX 10KE JTAG Waveforms
Table 18
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
Captured
Table 18. FLEX 10KE JTAG Timing Parameters & Values
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Driven
Signal
Signal
to Be
to Be
TMS
TDO
TCK
TDI
shows the timing parameters and values for FLEX 10KE devices.
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
shows the timing requirements for the JTAG signals.
t
JCH
t
t
JPZX
JSZX
t
JCP
t
JSSU
t
JCL
Parameter
t
JSH
t
t
JPCO
JSCO
t
JPSU
t
t
JSXZ
JPH
Altera Corporation
Min
100
50
50
20
45
20
45
t
JPXZ
Max
25
25
25
35
35
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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