EPM7256BTC144-5 Altera, EPM7256BTC144-5 Datasheet - Page 39

• Manufacturer Part Number: EPM7256BTC144-5
• Description: MAX 7000/S/AE/B
• Manufacturer: Altera

Altera Corporation
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
f
t
f
Symbol
PD1
PD2
SU
H
FSU
FH
FZHSU
FZHH
CO1
CH
CL
ASU
AH
ACO1
ACH
ACL
CPPW
CNT
CNT
ACNT
ACNT
Table 21. EPM7064B External Timing Parameters
Input to non-registered
output
I/O input to non-registered
output
Global clock setup time
Global clock hold time
Global clock setup time of
fast input
Global clock hold time of
fast input
Global clock setup time of
fast input with zero hold
time
Global clock hold time of
fast input with zero hold
time
Global clock to output
delay
Global clock high time
Global clock low time
Array clock setup time
Array clock hold time
Array clock to output delay C1 = 35 pF
Array clock high time
Array clock low time
Minimum pulse width for
clear and preset
Minimum global clock
period
Maximum internal global
clock frequency
Minimum array clock
period
Maximum internal array
clock frequency
Parameter
C1 = 35 pF
C1 = 35 pF
(2)
(2)
C1 = 35 pF
(2)
(2)
(2)
(2),
(2)
(2),
(3)
(3)
Conditions
(2)
(2)
(2)
MAX 7000B Programmable Logic Device Data Sheet
303.0
303.0
Min
Note (1)
2.1
0.0
1.0
1.0
2.0
0.0
1.0
1.5
1.5
0.9
0.2
1.0
1.5
1.5
1.5
-3
Max
3.5
3.5
2.4
3.6
3.3
3.3
212.8
212.8
Speed Grade
Min
3.0
0.0
1.0
1.0
2.5
0.0
1.0
2.0
2.0
1.3
0.3
1.0
2.0
2.0
2.0
-5
Max
5.0
5.0
3.4
5.1
4.7
4.7
142.9
142.9
Min
4.5
0.0
1.5
1.0
3.0
0.0
1.0
3.0
3.0
1.9
0.6
1.0
3.0
3.0
3.0
-7
Max
7.5
7.5
5.0
7.6
7.0
7.0
MHz
MHz
Unit
39
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns