KSZ8842-16MBLI TR Micrel Inc, KSZ8842-16MBLI TR Datasheet - Page 89

• Manufacturer Part Number: KSZ8842-16MBLI TR
• Description: 2-Port Ethernet Switch + Generic (8, 16-Bit) Bus Interface (I-Temp)
• Manufacturer: Micrel Inc

Specifications of KSZ8842-16MBLI TR

• Number Of Primary Switch Ports: 2
• Internal Memory Buffer Size: 32
• Operating Supply Voltage (typ): 3.3V
• Fiber Support: Yes
• Integrated Led Drivers: Yes
• Phy/transceiver Interface: MII
• Power Supply Type: Analog/Digital
• Data Rate (typ): 10/100Mbps
• Vlan Support: Yes
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Mounting: Surface Mount
• Jtag Support: No
• Operating Supply Voltage (max): 3.5V
• Operating Supply Voltage (min): 3.1V
• Operating Temperature Classification: Industrial
• Data Rate: 100Mbps
• Lead Free Status / RoHS Status: Compliant

Bank 45 PHY 1 MII-Register Basic Control Register (0x00): P1MBCR
This register contains Media Independent Interface (MII) register for switch port 1 as defined in the IEEE 802.3
specification.
Micrel, Inc.
Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
October 2007
Default
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
R/W
RO
RW
RW
RW
RW
RO
RW
RW
RO
RO
R/W
RW
RW
RW
RW
RW
Description
Soft reset
Not supported.
Far-End Loopback
1 = perform loopback as follows:
0 = normal operation.
Force 100
1 = force 100Mbps if AN is disabled (bit 12)
0 = force 10Mbps if AN is disabled (bit 12)
AN Enable
1 = auto-negotiation enabled.
0 = auto-negotiation disabled.
Power-Down
1 = power-down.
0 = normal operation.
Isolate
Not supported.
Restart AN
1 = restart auto-negotiation.
0 = normal operation.
Force Full Duplex
1 = force full duplex.
0 = force half duplex.
if AN is disabled (bit 12) or AN is enabled but
failed.
Collision test
Not supported.
Reserved.
HP_mdix
1 = HP Auto MDI-X mode.
0 = Micrel Auto MDI-X mode.
Force MDI-X
1 = force MDI-X.
0 = normal operation.
Disable MDI-X
1 = disable auto MDI-X.
0 = normal operation.
Reserved
Disable Transmit
1 = disable transmit.
0 = normal operation.
Disable LED
1 = disable LED.
0 = normal operation.
Start: RXP2/RXM2 (port 2)
Loop back: PMD/PMA of port 1’s PHY
End: TXP2/TXM2 (port 2)
89
Bit is same as:
Bank 49 0x02 bit 8
Bank 49 0x02 bit 6
Bank 49 0x02 bit 7
Bank 49 0x02 bit 11
Bank 49 0x02 bit 13
Bank 49 0x02 bit 5
Bank 49 0x04 bit 15
Bank 49 0x02 bit 9
Bank 49 0x02 bit 10
Bank 49 0x02 bit 12
Bank 49 0x02 bit 14
Bank 49 0x02 bit 15
KSZ8842-16/32 MQL/MVL/MVLI/MBL
M9999-102207-1.9