KSZ8842-16MVL Micrel Inc, KSZ8842-16MVL Datasheet - Page 126
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KSZ8842-16MVL
Manufacturer Part Number
KSZ8842-16MVL
Description
2-Port Ethernet Switch/Repeater + Generic (8, 16-bit) Bus Interface( )
Manufacturer
Micrel Inc
Specifications of KSZ8842-16MVL
Controller Type
Ethernet Switch Controller
Interface
PCI
Voltage - Supply
3.1 V ~ 3.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-LQFP
Number Of Primary Switch Ports
2
Internal Memory Buffer Size
32
Operating Supply Voltage (typ)
3.3V
Fiber Support
Yes
Integrated Led Drivers
Yes
Phy/transceiver Interface
MII
Power Supply Type
Analog/Digital
Data Rate (typ)
10/100Mbps
Vlan Support
Yes
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Pin Count
128
Mounting
Surface Mount
Jtag Support
No
Operating Supply Voltage (max)
3.5V
Operating Supply Voltage (min)
3.1V
Operating Temperature Classification
Commercial
Data Rate
100Mbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-1635 - BOARD EVALUATION KSZ8842-16MVL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-2119
KSZ8842-16MVL
KSZ8842-16MVL
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
KSZ8842-16MVL
Manufacturer:
Micrel
Quantity:
107
Company:
Part Number:
KSZ8842-16MVLI
Manufacturer:
Micrel
Quantity:
354
Asynchronous Timing using DATACSN (KSZ8842-32MQL/MVL device only)
Micrel, Inc.
October 2007
Symbol
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
Note 1: When CPU finished current Read or Write operation, it can do next Read or Write operation even the
Note 2: In order to speed up the ARDY low time to 40 ns, user has to use the turbo software driver which is only
(Read Cycle)
( Write Cycle)
RDN, WRN
Write Data
DATACSN
Read Data
supported in the A6 device. Please refer to the “KSZ88xx Programmer's Guide” for detail.
ARDY is low. During Read or Write operation if the ADRY is low, the CPU has to keep the RDN/WRN
low until the ARDY returns to high.
ARDY
ARDY
Parameter
DATACSN setup to RDN, WRN active
DATACSN hold after RDN, WRN inactive (assume
ADSN tied Low)
Read data hold to ARDY rising
Read data to RDN hold
Write data setup to WRN inactive
Write data hold after WRN inactive
Read active to ARDY Low
Write inactive to ARDY Low
ARDY low (wait time) in read cycle (Note1)
(It is 0ns to read bank select register and 40ns to
read QMU data register in turbo mode) (Note2)
ARDY low (wait time) in read cycle (Note1)
(It is 0ns to read bank select register and 80ns to
read QMU data register in normal mode)
ARDY low (wait time) in write cycle (Note1)
(It is 0ns to write bank select register)
(It is 85ns to write QMU data register)
Table 26. Asynchronous Cycle using DATACSN Timing Parameters
Figure 19. Asynchronous Cycle – Using DATACSN
t1
t7
126
t9
t3
t5
valid
Min
2
0
4
4
2
0
0
0
valid
t2
t6
t8
KSZ8842-16/32 MQL/MVL/MVLI/MBL
t4
Typ
40
80
50
t10
Max
0.8
8
8
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
M9999-102207-1.9