KSZ8851-16MQL Micrel Inc, KSZ8851-16MQL Datasheet - Page 41

Single Ethernet Port + Generic (16-bit) Bus Interface( )

KSZ8851-16MQL

Manufacturer Part Number
KSZ8851-16MQL
Description
Single Ethernet Port + Generic (16-bit) Bus Interface( )
Manufacturer
Micrel Inc
Datasheets

Specifications of KSZ8851-16MQL

Controller Type
Ethernet Controller, MAC/PHY
Interface
Bus
Voltage - Supply
1.8V, 2.5V, 3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-MQFP, 128-PQFP
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
128
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
576-3292 - BOARD EVALUATION KSZ8851-16MLL
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
576-3253

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
KSZ8851-16MQL
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8851-16MQLI
Manufacturer:
MICREL
Quantity:
1 001
Part Number:
KSZ8851-16MQLI
Manufacturer:
Micrel Inc
Quantity:
10 000
Part Number:
KSZ8851-16MQLI
0
Micrel, Inc.
KSZ8851-16/32 MQL/MQLI
Loopback Support
The KSZ8851M provides two loopback modes, one is Near-end (Remote) loopback to support for remote diagnostic of
failure at line side, and the other is Far-end (Local) loopback to support for local diagnostic of failure at host side. In
loopback mode, the speed at the PHY port will be set to 100BASE-TX full-duplex mode.
Near-end (Remote) Loopback
Near-end (Remote) loopback is conducted at PHY port 1 of the KSZ8851M. The loopback path starts at the PHY port’s
receive inputs (RXP1/RXM1), wraps around at the same PHY port’s PMD/PMA, and ends at the PHY port’s transmit
outputs (TXP1/TXM1).
Bit [9] of register P1SCLMD (0xF4) is used to enable near-end loopback. The ports 1 near-end loopback path is illustrated
in the following Figure 11.
Far-end (Local) Loopback
Far-end (Local) loopback is conducted at Host of the KSZ8851M. The loopback path starts at the host port’s transmit
inputs (Tx data), wraps around at the PHY port’s PMD/PMA, and ends at the host port’s receive outputs (Rx data)
Bit [14] of register P1MBCR (0xE4) is used to enable far-end loopback at host side. The host far-end loopback path is
illustrated in the following Figure 11.
Figure 11. PHY Port 1 Near-end (Remote) and Host Far-end (Local) Loopback Paths
August 2009
41
M9999-083109-2.0

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