AD9863BCPRL-50 Analog Devices Inc, AD9863BCPRL-50 Datasheet - Page 8

• Manufacturer Part Number: AD9863BCPRL-50
• Description: IC FRONT-END MIXED SGNL 64-LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9863BCPRL-50

• Rohs Status: RoHS non-compliant
• Rf Type: WLL, WLAN
• Features: 12-bit ADC(s), 12-bit DAC(s)
• Package / Case: 64-VFQFN, CSP Exposed Pad

AD9863
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 8. Pin Function Descriptions
Pin No.
1
2
3
4
5, 31
6, 32
7, 16, 50, 51, 61
8, 9
10, 13, 49, 53, 59
11
12
14, 15
17
18
19 to 30
33
34 to 45
46
47
48
Name
SPI_DIO
(Interp1)
SPI_CLK
(Interp0)
SPI_SDO
(FD/HD)
ADC_LO_PWR
DVDD, DRVDD
DVSS, DRVDD
AVDD
IOUT−A, IOUT+A
AGND, AVSS
REFIO
FSADJ
IOUT+B, IOUT−B
IFACE2
(12/24)
IFACE3
U11 to U0
IFACE1
L11 to L0
RESET
CLKIN2
CLKIN1
1
ADC_LO_PWR
SPI_SDO
SPI_CLK
SPI_DIO
IOUT+A
IOUT+B
IOUT–A
IOUT–B
FSADJ
REFIO
AGND
AGND
DVDD
DVSS
AVDD
AVDD
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Description
SPI: Serial Port Data Input.
No SPI: Tx Interpolation Pin, MSB.
SPI: Serial Port Shift Clock.
No SPI: Tx Interpolation Pin, LSB.
SPI: 4-Wire Serial Port Data Output.
No SPI: Configures Full-Duplex or Half-Duplex Mode.
ADC Low Power Mode Enable. Defined at power-up.
Digital Supply.
Digital Ground.
Analog Supply.
DAC A Differential Output.
Analog Ground.
Tx DAC Band Gap Reference Decoupling Pin.
Tx DAC Full-Scale Adjust Pin.
DAC B Differential Output.
SPI: Buffered CLKIN. Can be configured as system clock output.
No SPI: Buffered CLKIN for FD; 12/24 configuration pin for HD24 or HD12.
Clock Output.
Upper Data Bit 11 to Upper Data Bit 0.
SPI: TxSYNC for FD; Tx/Rx for HD24, HD12, or clone.
No SPI: FD >> TxSYNC; HD24 or HD12: Tx/Rx. Clone mode requires a serial port
interface.
Lower Data Bit 11 to Lower Data Bit 0.
Chip Reset When Low.
Clock Input 2.
Clock Input 1.
Figure 3. Pin Configuration
Rev. A| Page 8 of 40
(Not to Scale)
AD9863
TOP VIEW
2, 3
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
CLKIN1
CLKIN2
RESET
L0
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
IFACE1