CYII4SC6600AB-QDC Cypress Semiconductor Corp, CYII4SC6600AB-QDC Datasheet - Page 24

• Manufacturer Part Number: CYII4SC6600AB-QDC
• Description: SENSOR IMAGE COLOR CMOS 68-LCC
• Manufacturer: Cypress Semiconductor Corp
• Type: CMOS Imagingr

Specifications of CYII4SC6600AB-QDC

• Package / Case: 68-LCC
• Pixel Size: 3.5µm x 3.5µm
• Active Pixel Array: 2210H x 3002V
• Frames Per Second: 5
• Voltage - Supply: 2.5V, 3.3V
• Operating Supply Voltage: 2.5 V to 3.3 V
• Maximum Operating Temperature: + 65 C
• Minimum Operating Temperature: - 30 C
• Image Size: 2210 H x 3002 V
• Color Sensing: Color
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

Basic Frame and Line Timing
The basic frame and line timing of the IBIS4-6600 sensor is shown in
The pulse width of Y_CLOCK must be a minimum of one clock cycle and three clock cycles for Y_START. As long as Y_CLOCK is
applied, the sequencer stays in a suspended state.
Both EOF and EOL can be tied to Y_START (EOF) and Y_CLOCK (EOL) if both signals are delayed with at least 2 SYS_CLOCK
periods to let the sensor run automatically.
Document Number: 001-02366 Rev. *G
T1
T2
T3
T4
Row blanking time: During this period, the X-sequencer generates the control signals to sample the pixel signal and pixel
reset levels, and start the readout of one line. It depends on the granularity of the X-sequencer clock (see
Pixels counted by pixel counter until the value of Nrof_pixels register is reached. Pixel_valid goes high when the internal
X_sync signal is generated. In other words, when the readout of the pixels is started. Pixel_valid goes low when the pixel
counter reaches the value loaded in the Nrof_pixels register. Eol goes high Sys_clock cycle after the falling edge of Pixel_valid.
EOF goes high when the line counter reaches the value loaded in the NROF_LINES register and the line is read (PIXEL_VALID
goes low).
The time delay between successive Y_CLOCK pulses needs to be equal to avoid any horizontal illumination (integration)
discrepancies in the image.
Figure 23. Basic Frame and Line Timing
Figure
23.
IBIS4-6600 CYII4SM6600AB
Table 12
Page 24 of 34
on page 20).
[+] Feedback