LTC4215CUFD#TR Linear Technology, LTC4215CUFD#TR Datasheet - Page 5
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LTC4215CUFD#TR
Manufacturer Part Number
LTC4215CUFD#TR
Description
IC,Power Control/Management,CMOS,LLCC,24PIN,PLASTIC
Manufacturer
Linear Technology
Datasheet
1.LTC4215CUFDTR.pdf
(28 pages)
Specifications of LTC4215CUFD#TR
Linear Misc Type
Positive Low Voltage
Family Name
LTC4215
Package Type
QFN EP
Operating Supply Voltage (min)
2.9V
Operating Supply Voltage (max)
15V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Product Depth (mm)
4mm
Product Length (mm)
5mm
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
ELECTRICAL CHARACTERISTICS
SYMBOL
TUE
FSE
V
R
I
I
V
I
V
I
I
V
V
I
V
I
f
t
t
t
t
t
t
t
t
C
temperature range, otherwise specifi cations are at T
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into pins are positive; all voltages are referenced to
GND unless otherwise specifi ed.
Note 3: An internal clamp limits the GATE pin to a minimum of 5V above
SOURCE. Driving this pin to voltages beyond the clamp may damage the device.
ADIN
2
ADR(IN,Z)
ADR(IN)
ALERT
SDA,SCL(OH)
2
SCL(MAX)
BUF(MIN)
HD,STA(MIN)
SU,STA(MIN)
SU,STO(MIN)
HD,DAT(MIN)
HD,DATO
SU,DAT(MIN)
SP
FS
ADR(H)
ADR(L)
ALERT(OL)
SDA,SCL(TH)
SDA(OL)
X
ADIN
C Interface
C Interface Timing
PARAMETER
Total Unadjusted Error
Full-Scale Error
Full-Scale Voltage (255 • V
ADIN Pin Sampling Resistance
ADIN Pin Input Current
Conversion Rate
ADR0, ADR1, ADR2 Input High Voltage
ADR0, ADR1, ADR2 Hi-Z Input Current
ADR0, ADR1, ADR2 Input Low Voltage
ADR0, ADR1, ADR2 Input Current
ALERT Input Current
ALERT Output Low Voltage
SDA, SCL Input Threshold
SDA, SCL Input Current
SDA Output Low Voltage
SCL Clock Frequency
Bus Free Time Between Stop/Start Condition
Hold Time After (Repeated) Start Condition
Repeated Start Condition Set-Up Time
Stop Condition Set-Up Time
Data Hold Time (Input)
Data Hold Time (Output)
Data Set-Up Time
Suppressed Spike Pulse Width
SCL, SDA Input Capacitance
LSB
)
A
= 25°C. V
The
CONDITIONS
V
SOURCE
ADIN
V
SOURCE
ADIN
V
SOURCE
ADIN
V
V
ADR0, ADR1, ADR2 = 0.8V
ADR0, ADR1, ADR2 = INTV
ADR0, ADR1, ADR2 = 0V, INTV
ALERT = 6.5V
I
SCL, SDA = 6.5V
I
Operates with f
SDAI Tied to SDAO (Note 6)
ALERT
SDA
DD
DD
DD
ADIN
ADIN
l
DD
– SENSE
– SENSE
– SENSE
= 3mA
denotes the specifi cations which apply over the full operating
= 1.28V
= 1.28V
= 3mA
= 12V unless otherwise noted.
Note 4: Offset error is the offset voltage measured from 1LSB when the
output code fl ickers between 0000 0000 and 0000 0001.
Note 5: Integral nonlinearity is defi ned as the deviation of a code from a
precise analog input voltage. Maximum specifi cations are limited by the
LSB step size and the single shot measurement. Typical specifi cations are
measured from the 1/4, 1/2 and 3/4 areas of the quantization band.
Note 6: Guaranteed by design and not subject to test.
SCL
≤ f
SCL(MAX)
CC
– 0.8V
CC
LTC4215/LTC4215-2
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
37.625
INTV
15.14
1.205
–0.8
MIN
–80
400
300
0.2
1.3
50
1
3
CC
INTV
38.45
15.44
1000
–0.4
1.23
0.12
TYP
140
500
110
0.4
0.2
1.7
0.2
10
30
30
30
30
2
0
CC
39.275
INTV
15.74
1.255
MAX
±5.5
±5.0
±5.0
±5.5
±5.0
±5.0
±0.1
–0.2
600
600
600
100
900
600
250
0.8
0.4
1.9
0.4
1.3
–3
80
±1
±1
10
CC
UNITS
4215fe
5
LSB
LSB
LSB
LSB
LSB
LSB
MΩ
kHz
mV
μA
μA
μA
μA
μA
μA
Hz
μs
ns
ns
ns
ns
ns
ns
ns
pF
V
V
V
V
V
V
V