LTC4260CSW#TR Linear Technology, LTC4260CSW#TR Datasheet - Page 4

MS-Hot Swap/High Voltage, 48V Hot Swap Controller With I2C ADC

LTC4260CSW#TR

Manufacturer Part Number
LTC4260CSW#TR
Description
MS-Hot Swap/High Voltage, 48V Hot Swap Controller With I2C ADC
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4260CSW#TR

Family Name
LTC4260
Package Type
SOIC W
Operating Supply Voltage (min)
8.5V
Operating Supply Voltage (max)
80V
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
24
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LTC4260CSW#TRLTC4260CSW#PBF
Manufacturer:
Linear Technology
Quantity:
135
LTC4260
ELECTRICAL CHARACTERISTICS
temperature range, otherwise specifications are at T
SYMBOL
AC Parameters
t
t
t
ADC
I
V
V
I
V
I
V
V
I
I
f
t
t
t
t
t
t
t
t
C
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
4
PLH(GATE)
PHL(GATE)
PHL(SENSE)
2
ADR(IN)
SDAI,SCL(IN)
SDAO,ALERT(IN)
2
SCL(MAX)
BUF(MIN)
SU,STA(MIN)
HD,STA(MIN)
SU,STO(MIN)
SU,DAT(MIN)
HD,DATI(MIN)
HD,DATO(MIN)
SP(MAX)
ADR(H)
ADR(L)
SDAI,SCL(TH)
SDAO(OL)
ALERT(OL)
X
C Interface
C Interface Timing (Note 4)
PARAMETER
Input High (ON) to GATE High
Propagation Delay
Input High (OV, BD_PRST), Input Low
(ON, UV) to GATE Low Propagation Delay
(V
Resolution (No Missing Codes)
Integral Nonlinearity
Offset Error
Full Scale Error
Total Unadjusted Error
Full Scale Voltage (Code 255)
Conversion Rate
ADR0 to ADR2 Input High Voltage
Threshold
ADR0 to ADR2 Input Low Voltage Threshold
ADR0 to ADR2 Input Current
SDAI, SCL Input Threshold
SDAI, SCL Input Current
SDAO Output Low Voltage
ALERT Output Low Voltage
SDAO, ALERT Input Current
Maximum SCL Clock Frequency
Minimum Bus Free Time Between
Stop/Start Condition
Minimum Repeated Start Condition
Set-Up Time
Minimum Hold Time After (Repeated) Start
Condition
Minimum Stop Condition Set-Up Time
Minimum Data Set-Up Time Input
Minimum Data Hold Time Input
Minimum Data Hold Time Output
Maximum Suppressed Spike Pulse Width
SCL, SDA Input Capacitance
DD
– SENSE) High to GATE Low
A
= 25°C. V
CONDITIONS
C
C
V
(Note 4)
V
SOURCE
ADIN
V
SOURCE
ADIN
(Note 6)
(Note 6)
V
SOURCE
ADIN
ADR0 to ADR2 = 0V, 5.5V
SCL, SDAI = 5V
I
I
SDAO, ALERT = 5V
Operates with f
SDAI Tied to SDAO
SDAO
ALERT
GATE
GATE
DD
DD
DD
DD
The
– SENSE = 200mV, C
– SENSE (Note 5)
– SENSE
– SENSE (Note 6)
= 5mA
= 1pF
= 1pF
= 5mA
DD
denotes the specifications which apply over the full operating
= 48V, unless otherwise noted.
SCL
Note 2: All currents into pins are positive, all voltages are referenced to
GND unless otherwise specified.
≤ f
SCL(MAX)
GATE
= 10nF
INTV
– 0.6
MIN
2.50
0.25
–80
100
400
300
1.6
75
50
8
CC
INTV
– 0.45
–100
TYP
±0.5
±0.2
±0.2
76.5
10.2
2.55
0.45
0.12
140
500
110
0.5
0.4
1.8
0.2
0.2
10
30
30
30
1
0
0
5
CC
INTV
– 0.25
±1.25
±1.25
MAX
±1.5
2.60
0.65
104
600
600
600
100
900
250
0.4
0.4
1.3
±2
±1
±1
±5
±5
78
80
±1
±1
10
3
3
1
2
0
CC
UNITS
4260fa
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
Bits
kHz
mV
µA
µA
µA
µs
µs
µs
Hz
µs
ns
ns
ns
ns
ns
ns
ns
pF
V
V
V
V
V
V
V

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