LTC6905CS5#PBF Linear Technology, LTC6905CS5#PBF Datasheet - Page 5
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LTC6905CS5#PBF
Manufacturer Part Number
LTC6905CS5#PBF
Description
Manufacturer
Linear Technology
Type
Silicon Oscillatorr
Datasheet
1.LTC6905CS5PBF.pdf
(12 pages)
Specifications of LTC6905CS5#PBF
Mounting Style
Surface Mount
Screening Level
Industrial
Product Length (mm)
2.9mm
Product Depth (mm)
1.75mm
Product Height (mm)
0.9mm
Package / Case
TSOT-23
Lead Free Status / RoHS Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
PIN FUNCTIONS
V
ply must be kept free from noise and ripple. It should be
bypassed directly to the GND (Pin 2) with a 0.1μF capaci-
tor or higher.
GND (Pin 2): Ground. Should be tied to a ground plane
for best performance.
SET (Pin 3): Frequency-Setting Resistor Input. The value
of the resistor connected between this pin and V
mines the oscillator frequency. The voltage on this pin is
held by the LTC6905 to approximately 1V below the V
voltage. For best performance, use a precision metal fi lm
resistor with a value between 10k and 25k and limit the
capacitance on this pin to less than 10pF .
DIV (Pin 4): Divider-Setting Input. This three-state input
selects among three divider settings, determining the value
TYPICAL PERFORMANCE CHARACTERISTICS
+
(Pin 1): Voltage Supply (2.7V ≤ V
45
40
35
30
25
20
15
10
5
0
2.5
R
OUT
3
vs V
SUPPLY VOLTAGE (V)
+
1V/DIV
3.5
LTC6905 Output Operating at
17.5MHz, V
4
4.5
S
5
12.5ns/DIV
= 3V
6905 G04
5.5
+
≤ 5.5V). This sup-
0.80
0.60
0.40
1.20
1.00
0.20
0
6905 G06
0
Jitter vs Frequency
20
+
÷4
deter-
40
÷2
FREQUENCY (MHz)
60
+
80 100
of N in the frequency equation. Pin 4 should be tied to V
for the ÷1 setting, the highest frequency range. Floating
Pin 4 divides the master oscillator by 2. Pin 4 should
be tied to GND for the ÷4 setting, the lowest frequency
range. To detect a fl oating DIV pin, the LTC6905 attempts
to pull the pin toward midsupply. This is realized with two
internal current sources, one tied to V
other one tied to ground and Pin 4. Therefore, driving
the DIV pin high requires sourcing approximately 15μA.
Likewise, driving DIV low requires sinking 11μA. When
Pin 4 is fl oated, it should be bypassed by a 1nF capacitor
to ground or it should be surrounded by a ground shield
to prevent excessive coupling from other PCB traces.
OUT (Pin 5): Oscillator Output. This pin can drive 5kΩ
and/or 5pF loads. For larger loads, refer to the Applications
Information section.
120 140 160
1V/DIV
÷1
LTC6905 Output Operating at
170MHz, V
6905 G05
180
S
= 3V
1ns/DIV
–0.2
–0.4
–0.6
–0.8
–1.0
1.0
0.8
0.6
0.4
0.2
0
–40
Frequency vs Temperature
–20
0
TEMPERATURE (°C)
20
6905 G07
+
40
and Pin 4 and the
LTC6905
60
80 100 120
6905 G08
6905fd
5
+