STS5DNF20V STMicroelectronics, STS5DNF20V Datasheet

MOSFET 2N-CH 20V 5A 8-SOIC

STS5DNF20V

Manufacturer Part Number
STS5DNF20V
Description
MOSFET 2N-CH 20V 5A 8-SOIC
Manufacturer
STMicroelectronics
Series
STripFET™r
Datasheet

Specifications of STS5DNF20V

Fet Type
2 N-Channel (Dual)
Fet Feature
Logic Level Gate
Rds On (max) @ Id, Vgs
40 mOhm @ 2.5A, 4.5V
Drain To Source Voltage (vdss)
20V
Current - Continuous Drain (id) @ 25° C
5A
Vgs(th) (max) @ Id
600mV @ 250µA
Gate Charge (qg) @ Vgs
11.5nC @ 4.5V
Input Capacitance (ciss) @ Vds
460pF @ 25V
Power - Max
2W
Mounting Type
Surface Mount
Package / Case
8-SOIC (3.9mm Width)
Configuration
Dual Dual Drain
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
0.03 Ohms
Drain-source Breakdown Voltage
20 V
Gate-source Breakdown Voltage
+/- 12 V
Continuous Drain Current
5 A
Power Dissipation
1.6 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-3229-2

Available stocks

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General features
Description
This Power MOSFET is the latest development of
STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalanche characteristics and
less critical alignment steps therefore a
remarkable manufacturing reproducibility.
Applications
November 2006
Order codes
STS5DNF20V
Ultra low threshold gate drive (2.7 V)
Standard outline for easy automated surface
mount assembly
Switching application
Type
STS5DNF20V
Part number
V
20V
DSS
<0.040Ω (@) 4.5)
<0.045Ω (@) 2.7)
R
DS(on)
S5DNF20V
Marking
2.7V - drive STripFET™ II Power MOSFET
5A
I
D
Rev 5
N-channel 20V - 0.030Ω - 5A SO-8
Internal schematic diagram
Package
SO-8
STS5DNF20V
S0-8
Packaging
Tape & reel
www.st.com
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STS5DNF20V Summary of contents

Page 1

... Applications ■ Switching application Order codes Part number STS5DNF20V November 2006 N-channel 20V - 0.030Ω SO-8 2.7V - drive STripFET™ II Power MOSFET R I DS(on Internal schematic diagram Marking S5DNF20V Rev 5 STS5DNF20V S0-8 Package Packaging SO-8 Tape & reel 1/12 www.st.com 12 ...

Page 2

... Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) 3 Test circuit 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/ STS5DNF20V . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 ...

Page 3

... STS5DNF20V 1 Electrical ratings Table 1. Absolute maximum ratings Symbol V Drain-source voltage ( Gate- source voltage GS I Drain current (continuos Drain current (continuos (1) I Drain current (pulsed) DM Total dissipation TOT dual operation Total dissipation TOT single operation 1. Pulse width limited by safe operating area Table 2. ...

Page 4

... Test conditions V = 15V 25V MHz 16V 4.5V GS (see Figure 13) Parameter Test conditions V = =4.7Ω (see Figure 12 =4.7Ω (see Figure 12) STS5DNF20V Min. Typ 250µA 0 2.5A 0.030 0.040 D = 2.5A 0.037 0.045 D Min. Typ. Max. =2 460 200 50 8.5 11.5 = 5A, D 1.8 2.4 Min. ...

Page 5

... STS5DNF20V Table 6. Source drain diode Symbol I Source-drain current SD (1) I Source-drain current (pulsed) SDM (2) V Forward on voltage SD t Reverse recovery time rr Q Reverse recovery charge rr I Reverse recovery current RRM 1. Pulse width limited by safe operating area. 2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % ...

Page 6

... Electrical characteristics 2.1 Electrical characteristics (curves) Figure 1. Safe operating area Figure 3. Output characterisics Figure 5. Transconductance 6/12 Figure 2. Thermal impedance Figure 4. Transfer characteristics Figure 6. Static drain-source on resistance STS5DNF20V ...

Page 7

... STS5DNF20V Figure 7. Gate charge vs gate-source voltage Figure 8. Figure 9. Normalized gate threshold voltage vs temperature Figure 11. Source-drain diode forward characteristics Electrical characteristics Capacitance variations Figure 10. Normalized on resistance vs temperature 7/12 ...

Page 8

... Test circuit Figure 12. Switching times test circuit for resistive load Figure 14. Test circuit for inductive load switching and diode recovery times Figure 16. Unclamped inductive waveform 8/12 Figure 13. Gate charge test circuit Figure 15. Unclamped Inductive load test circuit Figure 17. Switching time waveform STS5DNF20V ...

Page 9

... STS5DNF20V 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 10

... STS5DNF20V inch MIN. TYP. MAX. 0.068 0.003 0.009 0.064 0.025 0.033 0.013 0.018 0.007 0.010 0.010 0.019 0.188 0.196 0.228 0.244 ...

Page 11

... STS5DNF20V 5 Revision history Table 7. Revision history Date 21-Jun-2004 13-Nov-2006 Revision 4 Complete document 5 The document has been reformatted Revision history Changes 11/12 ...

Page 12

... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 12/12 Please Read Carefully: © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com STS5DNF20V ...

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