FDD5614P Fairchild Semiconductor, FDD5614P Datasheet - Page 5

• Manufacturer Part Number: FDD5614P
• Description: MOSFET P-CH 60V 15A DPAK
• Manufacturer: Fairchild Semiconductor
• Series: PowerTrench®r
• Type: Power MOSFETr

Specifications of FDD5614P

• Fet Type: MOSFET P-Channel, Metal Oxide
• Fet Feature: Logic Level Gate
• Rds On (max) @ Id, Vgs: 100 mOhm @ 4.5A, 10V
• Drain To Source Voltage (vdss): 60V
• Current - Continuous Drain (id) @ 25° C: 15A
• Vgs(th) (max) @ Id: 3V @ 250µA
• Gate Charge (qg) @ Vgs: 24nC @ 10V
• Input Capacitance (ciss) @ Vds: 759pF @ 30V
• Power - Max: 1.6W
• Mounting Type: Surface Mount
• Package / Case: DPak, TO-252 (2 leads+tab), SC-63
• Configuration: Single
• Transistor Polarity: P-Channel
• Resistance Drain-source Rds (on): 0.1 Ohm @ 10 V
• Forward Transconductance Gfs (max / Min): 8 S
• Drain-source Breakdown Voltage: 60 V
• Gate-source Breakdown Voltage: +/- 20 V
• Continuous Drain Current: 15 A
• Power Dissipation: 42000 mW
• Maximum Operating Temperature: + 175 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 55 C
• Number Of Elements: 1
• Polarity: P
• Channel Mode: Enhancement
• Drain-source On-res: 0.1Ohm
• Drain-source On-volt: 60V
• Gate-source Voltage (max): ±20V
• Operating Temp Range: -55C to 175C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Pin Count: 2 +Tab
• Package Type: TO-252
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: FDD5614PTR

Typical Characteristics
10
0.01
100
8
6
4
2
0
0.1
10
Figure 9. Maximum Safe Operating Area.
1
0
Figure 7. Gate Charge Characteristics.
0.1
I
0.001
D
0.01
= -4.5A
R
SINGLE PULSE
0.1
R
0.00001
DS(ON)
1
V
θ JA
T
GS
A
= 96
= 25
= -10V
LIMIT
o
o
C/W
C
D = 0.5
4
-V
DS
, DRAIN-SOURCE VOLTAGE (V)
0.2
Q
0.1
0.02
1
g
0.05
0.0001
, GATE CHARGE (nC)
0.01
SINGLE PULSE
V
DS
8
= -40V
Figure 11. Transient Thermal Response Curve.
DC
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
10s
0.001
1s
10
100ms
-20V
10ms
12
1ms
100 µ s
-30V
0.01
100
16
t
1
, TIME (sec)
0.1
1000
40
30
20
10
800
600
400
200
0
0.1
0
Figure 8. Capacitance Characteristics.
0
Figure 10. Single Pulse Maximum
C
RSS
1
10
-V
1
Power Dissipation.
DS
C
, DRAIN TO SOURCE VOLTAGE (V)
OSS
20
t
1
10
, TIME (sec)
10
P(pk
30
Duty Cycle, D = t
T
R
)
J
θJA
R
C
- T
θJA
ISS
(t) = r(t) + R
A
t
1
= 96°C/W
40
SINGLE PULSE
= P * R
100
t
R
2
θ JA
T
100
A
= 96°C/W
= 25°C
θJA
V
FDD5614P Rev C1(W)
f = 1MHz
1
GS
θJA
(t)
/ t
50
= 0 V
2
1000
1000
60