CS4207-DNZR Cirrus Logic Inc, CS4207-DNZR Datasheet - Page 76

• Manufacturer Part Number: CS4207-DNZR
• Description: Audio CODECs IC Lo Pwr,4/6 HD Aud Codec w/HP Amp
• Manufacturer: Cirrus Logic Inc

Specifications of CS4207-DNZR

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

76
2
1
0
Read/Write
Read/Write
Read/Write
0b
0b
0b
VCFG (Validity Config.): Determines S/PDIF
transmitter behavior when data is not being
transmitted. When asserted, this bit forces the
de-assertion of the S/PDIF “Validity” flag, which
is bit 28 transmitted in each S/PDIF subframe.
This bit is only defined for Output Converters and
is defined as Reserved, with a Read Only value
of 0 for Input Converters.





V (Validity): This bit affects the “Validity flag,”
bit[28] transmitted in each subframe, and
enables the S/PDIF transmitter to maintain con-
nection during error or mute conditions. The
behavior of the S/PDIF transmitter with respect
to this bit depends on the value of the “VCFG”
bit.
DigEn (Digital Enable): Enables or disables digi-
tal transmission. A 1 indicates that the digital
data can pass through the node. A 0 indicates
that the digital data is blocked from passing
through the node, regardless of the state.
If “V” = 0 and “VCFG”=0, then for each
S/PDIF subframe (Left and Right) bit[28]
“Validity” flag reflects whether or not an
internal codec error has occurred (specifically
whether the S/PDIF interface received and
transmitted a valid sample from the High
Definition Audio Link). If a valid sample (Left
or Right) was received and successfully
transmitted, the “Validity” flag should be 0 for
that subframe. Otherwise, the “Validity” flag
for that subframe should be transmitted as
“1.”
If “V” = 0 and “VCFG” = 1, then for each
S/PDIF subframe (Left and Right), bit[28]
“Validity” flag reflects whether or not an
internal codec transmission error has
occurred. Specifically, an internal codec error
should result in the “Validity” flag being set to
1. In the case where the S/PDIF transmitter is
not receiving a sample or does not receive a
valid sample from the High Definition Audio
Controller (Left or Right), the S/PDIF
transmitter should set the S/PDIF “Validity”
flag to 0 and pad each of the S/PDIF “Audio
Sample Word” in question with 0’s for the
subframe in question. If a valid sample (Left
or Right) was received and successfully
transmitted, the “Validity” flag should be 0 for
that subframe.
If “V” = 1 and “VCFG” = 0, then each S/PDIF
subframe (Left and Right) should have bit[28]
“Validity” flag = 1. This tags all S/PDIF
subframes as invalid.
“V” = 1 and “VCFG” = 1 state is reserved for
future use.
Default state, coming out of reset, for “V” and
“VCFG” should be 0 and 0 respectively.
CS4207
DS880F1