Si8244CB-B-IS1 Silicon Laboratories Inc, Si8244CB-B-IS1 Datasheet
Si8244CB-B-IS1
Specifications of Si8244CB-B-IS1
Related parts for Si8244CB-B-IS1
Si8244CB-B-IS1 Summary of contents
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Features 0.5 A peak output (Si8241) 4.0 A peak output (Si8244) PWM input High-precision linear programmable dead-time ...
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Si824x 2 Rev. 0.2 ...
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T C ABLE O F ONTENTS Section 1. Top-Level Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Si824x 1. Top-Level Block Diagram PWM LPWM DT VDDI VDDI UVLO DISABLE LPWM GNDI Figure 1. Si8241/44 Single-Input High-Side/Low-Side Isolated Drivers 4 VDDI UVLO DT CONTROL & OVERLAP PROTECTION VDDI UVLO Si8241/44 Rev. 0.2 VDDA VOA GNDA VDDB VOB GNDB ...
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Electrical Specifications Table 1. Electrical Characteristics 4.5 V < VDDI < 5.5 V, VDDA = VDDB = –40 to +125 °C. Typical specs at 25 °C Parameter Symbol DC Specifications Input-Side Power ...
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Si824x Table 1. Electrical Characteristics 4.5 V < VDDI < 5.5 V, VDDA = VDDB = –40 to +125 °C. Typical specs at 25 °C Parameter Symbol VDDI VDDI Undervoltage Threshold VDDI VDDI ...
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Test Circuits Figures 2 and 3 depict sink current and source current test circuits. INPUT Measure 50 ns VDDI GND 200 ns INPUT WAVEFORM INPUT Measure 50 ns VDDI GND 200 ns INPUT WAVEFORM Figure 3. Source Current Test ...
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Si824x Table 2. Absolute Maximum Ratings Parameter 2 Storage Temperature Ambient Temperature under Bias Input-side Supply Voltage Driver-side Supply Voltage Voltage on any Pin with respect to Ground Output Drive Current per Channel Lead Solder Temperature (10 sec) 3 Latchup ...
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Table 4. Insulation and Safety-Related Specifications Parameter Nominal Air Gap 1 (Clearance) Nominal External Tracking (Creepage) Minimum Internal Gap (Internal Clearance) Tracking Resistance (Proof Tracking Index) Erosion Depth Resistance 2 (Input-Output) Capacitance 2 (Input-Output) 3 Input Capacitance Notes: 1. The ...
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Si824x Table 6. IEC 60747-5-2 Insulation Characteristics* Parameter Maximum Working Insulation Voltage Input to Output Test Voltage Transient Overvoltage Pollution Degree (DIN VDE 0110, Table 1) Insulation Resistance 500 V IO *Note: Maintenance of ...
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Table 8. Thermal Characteristics Parameter IC Junction-to-Air Thermal Resistance Figure 4. NB SOIC-16, Thermal Derating Curve, Dependence of Safety Limiting Values with Case Symbol JA VDDI = 5.5 V VDDA, VDDB ...
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Si824x 3. Functional Description The operation of an Si824x channel is analogous to that of an opto coupler and gate driver, except an RF carrier is modulated instead of light. This simple architecture provides a robust isolated data path and ...
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Typical Performance Characteristics (0.5 Amp) The typical performance characteristics depicted in Figures 7 through 18 are for information purposes only. Refer to Table 1 on page 5 for actual specification limits Tfall VDD=12V, 25°C ...
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Si824x L VDD=12V, 25°C 10 0.0 0.5 1.0 Load (nF) Figure 13. Propagation Delay vs. Load VDD=12V, Load = 200pF 10 -40 - ...
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Typical Performance Characteristics (4.0 Amp) The typical performance characteristics depicted in Figures 19 through 30 are for information purposes only. Refer to Table 1 on page 5 for actual specification limits Tfall VDD=12V, 25°C ...
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Si824x VDD=12V, 25° Load (nF) Figure 25. Propagation Delay vs. Load VDD=12V, Load = 200pF 10 -40 -20 ...
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Family Overview and Logic Operation During Startup The Si824x family of isolated drivers consists of high-side, low-side, and dual driver configurations. 3.3.1. Products Table 9 shows the configuration and functional overview for each product in this family. Part Number ...
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Si824x 3.4. Power Supply Connections Isolation requirements mandate individual supplies for VDDI, VDDA, and VDDB. The decoupling caps for these supplies must be placed as close to the VDD and GND pins of the Si824x as possible. The optimum values ...
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Equation 1 and Equation 2 are graphed in Figure 31 where the points along the load line represent the package dissipation-limited value of CL for the corresponding switching frequency ...
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Si824x 3.6. Layout Considerations It is most important to minimize ringing in the drive path and noise on the Si824x VDD lines. Care must be taken to minimize parasitic inductance in these paths by locating the Si824x as close to ...
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Undervoltage Lockout (UVLO) The UVLO circuit unconditionally drives VO low when VDD is below the lockout threshold. Referring to Figures 34 and 35, upon power up, the Si824x is maintained in UVLO until VDD rises above VDD Si824x enters ...
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Si824x 3.8. Programmable Dead Time and Overlap Protection All high-side/low-side drivers (Si8241/4) include programmable overlap protection to prevent outputs VOA and VOB from being high at the same time. These devices also include programmable dead time, which adds a user- ...
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Applications The following examples illustrate typical circuit configurations using the Si824x. 4.1. Class D Digital Audio Driver Figures 38 and 39 show the Si8241/4 controlled by a single PWM signal. Supply can be unipolar (0 to 1500 V) or ...
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Si824x 5. Pin Descriptions Table 11. Si8241/44 PWM Input HS/LS Isolated Driver (SOIC-16) Pin Name 1 PWM PWM input connection. 3 VDDI Input-side power supply terminal; connect to a source of 4 GNDI ...
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... PWM Si8241CB-B-IS1 PWM Si8244BB-C-IS1 PWM Si8244CB-C-IS1 PWM Note: All packages are RoHS-compliant. Moisture sensitivity level is MSL3 for narrow-body SOIC-16 packages with peak reflow temperatures of 260 °C according to the JEDEC industry standard classifications and peak solder temperatures. Tape and reel options are specified by adding an “ ...
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Si824x 7. Package Outline: 16-Pin Narrow Body SOIC Figure 40 illustrates the package details for the Si824x in a 16-pin narrow-body SOIC (SO-16). Table 13 lists the values for the dimensions shown in the illustration. Figure 40. 16-pin Small Outline ...
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Land Pattern: 16-Pin Narrow Body SOIC Figure 41 illustrates the recommended land pattern details for the Si824x in a 16-pin narrow-body SOIC. Table 14 lists the values for the dimensions shown in the illustration. Figure 41. 16-Pin Narrow Body ...
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Si824x 9. Top Marking: 16-Pin Narrow Body SOIC Figure 42. 16-Pin Narrow Body SOIC Top Marking Table 15. 16-Pin Narrow Body SOIC Top Marking Explanations Base Part Number Ordering Options Line 1 Marking: See Ordering Guide for more information. YY ...
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OCUMENT HANGE IST Revision 0.1 to Revision 0.2 Deleted Table 3. Added Tables 3 through 8. Added Figure 4. Updated common-mode transient immunity specification throughout. Rev. 0.2 Si824x 29 ...
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