CS495313-CQZ Cirrus Logic Inc, CS495313-CQZ Datasheet - Page 26

• Manufacturer Part Number: CS495313-CQZ
• Description: Audio DSPs 32-Bit Decoder DSP w/Dual DSP Engine
• Manufacturer: Cirrus Logic Inc

Specifications of CS495313-CQZ

• Operating Temperature Range: 0 C to + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-144
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
5.20 Switching Characteristics — External Memory Interface - Flash Mode
26
Write Cycle
Address Setup time to EXT_WE# falling
EXT_CS# falling to EXT_WE# falling
EXT_CS# falling to EXT_WE# rising
EXT_WE# low time
Data Hold after EXT_WE# or EXT_CS# high
Address Hold from end of write
EXT_WE# falling to data valid
EXT_CS# high time
Read Cycle
Single Word Read Cycle
EXT_CS# falling to EXT_OE# falling
Data Hold after EXT_OE# or EXT_CS# high
Data Input Setup Time
Bus Turnaround Cycle Delay, Read to Write Cycle or Static
to Dynamic
1. The following parameters are set by communication with the application firmware. Please refer to AN288 or
2. A data write transaction is either a burst of two 16-bit half words or four 8-bit bytes with EXT_CS# toggling between
3. A data read transaction is either a burst of two 16-bit half words (as shown) or four 8-bit bytes with EXT_CS#
CS4953xx Firmware Users Manual for more information.
0 < Flash_WEN_CYCLE < 15
0 < Flash_WR_CYCLE < 31
1 < Flash_RD_CYCLE < 31
0 < Flash_OEN_CYCLE < 15
4 < Flash_TURN_CYCLE < 15
address phases.
remaining asserted between address phases.
1
,
3
2
Parameter
1
1
1
1
®Copyright 2008 Cirrus Logic, Inc.
Symbol
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xmwedv
t
t
t
t
t
t
t
t
t
xmwasu
xmcswe
xmcswa
t
xmcsh
t
xmcsoe
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xmwdh
xmwah
xmrdsu
xmturn
xmrdc
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1.2 * DCLKP
(Flash_WEN_CYCLE + 1.2)
(Flash_WR_CYCLE + 2.2)
2.2
0.9 * DCLKP
0.8 * DCLKP
-
TBD
(Flash_RD_CYCLE + 1)
Flash_OEN_CYCLE
4
7
(Flash_TURN_CYCLE + 1)
*
DCLKP
Min
*
DCLKP + 1
*
DCLKP
*
*
DCLKP
*
DCLKP
DCLKP
Max
0
DS705PP2
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns