CS495313-CQZR Cirrus Logic Inc, CS495313-CQZR Datasheet - Page 35

• Manufacturer Part Number: CS495313-CQZR
• Description: Audio DSPs IC 32-bit Decodr DSP w/Dual DSP Engine
• Manufacturer: Cirrus Logic Inc

Specifications of CS495313-CQZR

• Operating Temperature Range: 0 C to + 70 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-144
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

10. Revision History
DS705PP6
A1
A2
A3
A4
PP1
PP2
PP3
PP4
PP5
PP6
Revision
FEB 2006
JUN 2006
JUL 2006
OCT 2007
May 28, 2008
June 20, 2008
September 24, 2008
June 9, 2009
July 29, 2009
November 11, 2009
Date
Advance release.
Updated part numbers for ordering (Tables 5 & 6), Updated V
specification to include the current load used for testing
Updated part numbers for ordering (Tables 5 &6). Updated text in sections 3 and 4.
Updated parameter descriptions in sections 5.1 and 5.3. Updated Tspickl, Tspickh,
and Tspidov timing. Corrected Figure SPI Master Timing to use EE_CS. Added foot-
note to XTI table. Removed SCLK/LRCLK relative timing from DAI port timing.
Removed SCLK/LRCLK slave relative timing from DAO port timing.
Updated the Tspidsu, Tspickl, and Tspickh timing parameters for master mode SPI.
This applies to both SPI ports.
Updated product feature list in
Added typical crystal frequency values in Table Footnote 1 and Min and Max values
of F
5.17
clock speed for SCP_CLK in
characterization data in
Modified Footnote 1 under
Removed references to External Parallel Flash / SRAM Interface.
Updated product number references in
2,
designation from “#” character after the pin name to a line over the pin name as in
“EE_CS”. Removed Active Low designation from the BDI_REQ pin in the 128-pin
pinout drawings in
Figure 21
in
5.15.
Updated
CS495314-CQZR from
family be used with new designs. Updated
Removed references to UART port. Removed references to 11.2896,
18.432, and 27 MHz frequency clocks in Note 1 in
Characteristics — XTI” on page 12
Operating Frequency values in that same section. Updated
“ Switching Characteristics — DSD® Serial Input Port” on page
5.18 “Switching Characteristics — Digital Audio Output Port” on page
Figure 21, "144-pin LQFP Pin-Out Drawing (CS495313)", on page
moved SCP2_SDA from Pin 106 to Pin 105, deleted duplicate EE_CS from
Pin 25, and designated Pin 140 BDI_REQ as active low. Designated Pin 32,
BDI_REQ as active low In
(CS495303/CS495313)", on page 30
Out Drawing (CS495304/CS495314)", on page
parameter, “Input leakage current (all digital pins with internal pull-up
resistors enabled, and XTI)”, Max value changes from 50 μ A to 70 μ A. In
Section
symbol “tiicdov” Max value changes from 18 ns to 36 ns.
.
Figure
Table
xtal
. Removed reference to MCLK in
in
3, and
Copyright 2009 Cirrus Logic
Section
5.13, the parameter SCP_CLK low to SCP_SDA out valid with
Figure
9,
and
Figure
Figure
Table
19,
5.8.
Figure 19
10,
Figure
4.
Removed DSD Phase Modulation Mode from
22. Updated the pin names referred to in the timing diagrams
Figure
Table 5
For all Active Low pins,
Section 5.3
20,
and
17, and
Figure 19, "128-pin LQFP Pin-Out Drawing
Section 5.10
Table
Figure
and
Section 5.11
Figure
Table
Changes
2. Updated
Figure
21. Removed CS495314-CQZ and
, correcting units of measurement.
and the Min and Max External Crystal
Section
20, and in the 144-pin pinout drawings in
6. Added recommendation that CS4953x4
Section 5.17
and in
.
Section 2.
18. Updated the parameters in
. Redefined DC leakage
5.9,
Figure 19
Figure 20, "128-pin LQFP Pin-
changed Active Low pin
Section 6.
32-bit Audio Decoder DSP Family
31. In
. Redefined Master mode
Section 5.8 “Switching
and
Section
OH
,
Figure
Section 7.
CS4953xx Data Sheet
and V
Section 5.17
5.3, the
21.
OL
23.
Section
,
32,
Section
Table
Section
24. In
35