MC100LVEL33DT ON Semiconductor, MC100LVEL33DT Datasheet - Page 4

• Manufacturer Part Number: MC100LVEL33DT
• Description: Clock Drivers & Distribution 3.3V ECL Divide By 4
• Manufacturer: ON Semiconductor

Specifications of MC100LVEL33DT

• Mounting Style: SMD/SMT
• Package / Case: TSSOP-8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 5. AC CHARACTERISTICS
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
8. V
9. Duty cycle skew is the difference between T
f
t
t
t
t
t
V
t
t
Symbol
max
PLH
PHL
RR
skew
JITTER
r
f
PP
EE
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
can vary ±0.3 V.
Maximum Toggle Frequency
Propagation Delay
Reset Recovery
Duty Cycle Skew (Note 9)
Cycle−to−Cycle Jitter
Input Voltage Swing
(Differential Configuration)
Output Rise/Fall Times Q
(20% − 80%)
RESET
CLK
Q
Characteristic
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Figure 2. Typical Termination for Output Driver and Device Evaluation
CLK to Q (Diff)
CLK to Q (SE)
V
CC
Q
Q
Reset to Q
= 3.3 V; V
PLH
and T
Figure 1. Timing Diagram
EE
= 0.0 V or V
Min
530
530
500
300
150
120
PHL
3.4
Z
Z
http://onsemi.com
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o
.
= 50 W
= 50 W
−40°C
Typ
630
655
0.5
50 W
V
4
CC
TT
= 0.0 V; V
= V
1000
Max
<1.0
730
780
700
320
20
V
CC
TT
− 3.0 V
50 W
EE
Min
570
570
520
300
150
120
3.8
= −3.3 V (Note 8)
25°C
Typ
670
695
4.0
0.5
D
D
1000
Max
<1.0
770
820
720
320
20
Receiver
Device
Min
650
650
580
300
150
120
3.8
85°C
Typ
750
775
0.5
1000
Max
<1.0
850
900
780
320
20
GHz
Unit
mV
ps
ps
ps
ps
ps