MCP79401-I/SN Microchip Technology, MCP79401-I/SN Datasheet - Page 18

• Manufacturer Part Number: MCP79401-I/SN
• Description: Real Time Clock I2C GP RTCC 64B SRAM EUI-48
• Manufacturer: Microchip Technology
• Series: -r
• Type: Clock/Calendarr

Specifications of MCP79401-I/SN

• Features: Alarm, Leap Year, SRAM, Unique ID
• Memory Size: 64B
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: I²C
• Voltage - Supply: 1.8 V ~ 5.5 V
• Voltage - Supply, Battery: 1.3 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

MCP7940X
DS25009A-page 18
FIGURE 5-3:
5.2.2
Read operations are initiated in the same way as write
operations with the exception that the R/W bit of the
control byte is set to one. There are three basic types
of read operations: current address read, random read,
and sequential read. The SRAM array can be read in
the same way as the ID using the control byte for the
SRAM ‘1101111’ with a valid address.
5.2.2.1
The MCP7940X contains an address counter that
maintains the address of the last word accessed,
internally incremented by one. Therefore, if the
previous read access was to address n (n is any legal
address), the next current address read operation
would access data from address n + 1.
Upon receipt of the control byte with R/W bit set to one,
the MCP7940X issues an Acknowledge and transmits
the 8-bit data word. The master will not acknowledge
the transfer but does generate a Stop condition and the
MCP7940X discontinues transmission
FIGURE 5-4:
5.2.2.2
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, first the word address must
be set. This is done by sending the word address to the
MCP7940X as part of a write operation (R/W bit set to
‘0’). After the word address is sent, the master
generates a Start condition following the Acknowledge.
This terminates the write operation, but not before the
internal Address Pointer is set. Then, the master issues
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
Current Address Read
Random Read
READ OPERATION
S
S
T
A
R
T
1
0
CONTROL
1
BYTE
0
ID BYTE WRITE
CURRENT ADDRESS
READ (ID SHOWN)
BUS ACTIVITY
MASTER
SDA LINE
BUS ACTIVITY
1 1 1
1
A
C
K
1 1 1 1 0
(Figure
DATA
BYTE
S 1 0 1 0
S
T
A
R
T
• • •
CONTROL
5-5).
BYTE
N
O
C
A
K
1 1 1
S
T
O
P
P
0
A
C
K
1 1 1 1 0 • • •
ADDRESS
the control byte again but with the R/W bit set to a one.
The MCP7940X will then issue an Acknowledge and
transmit the 8-bit data word. The master will not
acknowledge the transfer but it does generate a Stop
condition which causes the MCP7940X to discontinue
transmission
command, the internal address counter will point to the
address location following the one that was just read.
5.2.2.3
Sequential reads are initiated in the same way as a
random read except that after the MCP7940X transmits
the first data byte, the master issues an Acknowledge
as opposed to the Stop condition used in a random
read. This Acknowledge directs the MCP7940X to
transmit the next sequentially addressed 8-bit word
(Figure
master, the master will NOT generate an Acknowledge
but will generate a Stop condition. To provide
sequential reads, the MCP7940X contains an internal
Address Pointer which is incremented by one at the
completion of each operation. This Address Pointer
allows the entire memory contents to be serially read
during one operation. The internal Address Pointer will
automatically roll over to the start of the Block.
BYTE
5-7). Following the final byte transmitted to the
Sequential Read
A
C
K
(Figure
DATA
5-6). After a random read
 2011 Microchip Technology Inc.
A
C
K
S
T
O
P
P