DS1344E-3+ Maxim Integrated Products, DS1344E-3+ Datasheet - Page 14

• Manufacturer Part Number: DS1344E-3+
• Description: Real Time Clock SPI RTC 20P TSSOP 3V 12.5PF ALRM
• Manufacturer: Maxim Integrated Products

Register 11h controls the devices’ trickle-charge char-
acteristics. The simplified schematic of Figure 2 shows
the basic components of the trickle charger. The trickle-
charge select (TCS[3:0]) bits (bits 7:4) control the
selection of the trickle charger. To prevent accidental
enabling, only a pattern of 1010 enables the trickle
charger; all other patterns disable the trickle charger.
On the initial application of power, the devices power
up with the trickle charger disabled. The diode-select
Low-Current SPI/3-Wire RTCs
14
BIT 7
BIT 7
TCS3
OSF
BIT 7
BIT 1
BIT 0
1
0
OSF: Oscillator stop flag. If the OSF bit is 1, the oscillator either has stopped or was stopped for some period
and could be used to judge the validity of the clock and calendar data. This bit is edge triggered and is set to
1 when the internal circuitry senses the oscillator has transitioned from a normal run state to a stop condition.
This bit remains at logic 1 until written to logic 0. Attempting to write OSF to 1 leaves the value unchanged.
The following are examples of conditions that can cause the OSF bit to be set:
1) The first time power is applied.
2) The voltage present on V
3) The EOSC bit is a logic one during battery backup.
4) External influences on the crystal (i.e., noise, leakage, etc.).
IRQF1: Interrupt request 1 flag. A logic 1 in the IRQF1 bit indicates that the time matched the Alarm 1 reg-
isters. This flag can be used to generate an interrupt on either INT0 or INT1 depending on the status of the
INTCN bit in the Control register. If the INTCN bit is 0 and IRQF1 is 1 (and the A1IE bit is also 1), INT0 goes
low. If the INTCN bit is 1 and IRQF1 is 1 (and the A1IE bit is also 1), INT1 goes low. IRQF1 is cleared when
the address pointer is set to any of the Alarm 1 registers during an I/O transaction. The IRQF1 bit can also
be cleared by writing it to 0. This bit can only be written to 0. Attempting to write the IRQF1 bit to 1 leaves the
value unchanged.
IRQF0: Interrupt request 0 flag. A logic 1 in the IRQF0 bit indicates that the time matched the Alarm 0 regis-
ters. If the A0IE bit is also 1, INT0 goes low. IRQF0 is cleared when the address pointer is set to any of the
Alarm 0 registers during an I/O transaction. The IRQF0 bit can also be cleared by writing it to 0. This bit can
only be written to 0. Attempting to write the IRQF0 bit to 1 leaves the value unchanged.
BIT 6
TCS2
BIT 6
0
0
0
BIT 5
TCS1
BIT 5
0
0
0
CC
is insufficient to support oscillation.
BIT 4
BIT 4
TCS0
0
0
0
(DS[1:0]) bits (bits 3:2) select whether or not a diode is
connected between V
(RS[1:0]) bits (bits 1:0) select the resistor that is con-
nected between V
select the resistor and diodes, as shown in Table 3. The
user determines diode and resistor selection according
to the maximum current desired for secondary battery or
super cap charging. The maximum charging current can
be calculated using the equation that follows.
BIT 3
BIT 3
DS1
0
0
0
BIT 2
BIT 2
Trickle Charger Register (11h)
DS0
CC
0
0
0
CC
and V
and V
Status Register (10h)
BAT
IRQF1
BIT 1
BIT 1
BAT
RS1
. The RS and DS bits
0
0
. The resistor-select
IRQF0
BIT 0
BIT 0
RS0
0
0