CY28346ZXC-2T Silicon Laboratories Inc, CY28346ZXC-2T Datasheet - Page 10

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CY28346ZXC-2T

Manufacturer Part Number
CY28346ZXC-2T
Description
Clock Synthesizer / Jitter Cleaner NB Clk Intel Brkdale 830M & 845 chipsets
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of CY28346ZXC-2T

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Rev 1.0, November 24, 2006
PCI_STP# Assertion
The PCI_STP# signal is an active LOW input used for
synchronous stopping and starting the PCI outputs while the
rest of the clock generator continues to function. The set-up
Table 7. Cypress Clock Power Management Truth Table
B0b6
CPU_STP#
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
CPUC
CPUT
CPUC
CPUT
B1b6
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
PD#
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
CPU_STP# Stoppable CPUT
Figure 10. CPU_STP# Deassertion Waveform
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Running
Running
Running
Running
Iref x6
Iref x2
Iref x2
Iref x6
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
time for capturing PCI_STP# going LOW is 10 ns (t
Figure 14.) The PCI_F (0:2) clocks will not be affected by this
pin if their control bits in the SMBus register are set to allow
them to be free running.
Stoppable
Running
Running
Running
Running
CPUC
Iref x6
Iref x6
LOW
LOW
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Non-Stop CPUT Non-Stop CPUC
Running
Running
Running
Running
Running
Running
Running
Running
Iref x2
Iref x2
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
CY28346
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Running
Running
Running
Running
Running
Running
Running
Running
LOW
LOW
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
setup
) (see

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