CY28400OXC-2T Silicon Laboratories Inc, CY28400OXC-2T Datasheet - Page 4

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CY28400OXC-2T

Manufacturer Part Number
CY28400OXC-2T
Description
Clock Buffer PCIe buffer 1in 4out
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of CY28400OXC-2T

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Rev 1.0, November 21, 2006
Byte 0: Control Register 0 (continued)
Byte 1: Control Register 1
Byte 2: Control Register 2
Bit
Bit
Bit
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
@pup
@pup
@pup
0
0
0
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
Reserved
Reserved
Reserved
HIGH_BW#
PLL/BYPASS#
SRC_DIV2#
Reserved
OE_6
OE_5
Reserved
Reserved
OE_2
OE_1
Reserved
Reserved
SRC_STP_DIF[T/C]6
SRC_STP_DIF[T/C]5
Reserved
Reserved
SRC_STP_DIF[T/C]2
SRC_STP_DIF[T/C]1
Reserved
Name
Name
Name
Reserved
Reserved
Reserved
HIGH_BW#
0 = High Bandwidth, 1 = Low bandwidth
PLL/BYPASS#
0 = Fanout buffer, 1 = PLL mode
SRC_DIV2# configures output frequency at half the input frequency
0 = Divided by 2 mode (output = input/2),1 = Normal (output = input)
Reserved
DIF[T/C]6 Output Enable
0 = Disabled (Tri-state)
1 = Enabled
DIF[T/C]5 Output Enable
0 = Disabled (Tri-state)
1 = Enabled
Reserved
Reserved
DIF[T/C]2 Output Enable
0 = Disabled (Tri-state)
1 = Enabled
DIF[T/C]1 Output Enable
0 = Disabled (Tri-state)
1 = Enabled
Reserved
Reserved
Allow Control DIF[T/C]6 with assertion of SRC_STP
0 = Free-running
1 = Stopped with SRC_STP
Allow Control DIF[T/C]5 with assertion of SRC_STP
0 = Free-running
1 = Stopped with SRC_STP
Reserved
Reserved
Allow Control DIF[T/C]2 with assertion of SRC_STP
0 = Free-running
1 = Stopped with SRC_STP
Allow Control DIF[T/C]1 with assertion of SRC_STP
0 = Free-running
1 = Stopped with SRC_STP
Reserved
Description
Description
Description
CY28400-2
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