M41ST85YMH6 STMicroelectronics, M41ST85YMH6 Datasheet - Page 24

Real Time Clock Serial 512 (64x8)

M41ST85YMH6

Manufacturer Part Number
M41ST85YMH6
Description
Real Time Clock Serial 512 (64x8)
Manufacturer
STMicroelectronics
Datasheet

Specifications of M41ST85YMH6

Function
Clock, Calendar, Supervisor, Alarm
Rtc Memory Size
64 B
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Rtc Bus Interface
Serial
Package / Case
SO-28
Time Format
HH:MM:SS:hh
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Manufacturer
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M41ST85YMH6
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ST
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Clock operation
Figure 16. Backup mode alarm waveform
3.5
Note:
Note:
24/41
V CC
V PFD
V SO
ABE, AFE Bits in Interrupt Register
AF bit in Flags Register
IRQ/FT/OUT
Watchdog timer
The watchdog timer can be used to detect an out-of-control microprocessor. The user
programs the watchdog timer by setting the desired amount of time-out into the watchdog
register, address 09h. Bits BMB4-BMB0 store a binary multiplier and the two lower order bits
RB1-RB0 select the resolution, where 00 = 1/16 second, 01 = 1/4 second, 10 = 1 second,
and 11 = 4 seconds. The amount of time-out is then determined to be the multiplication of
the five-bit multiplier value with the resolution. (For example: writing 00001110 in the
watchdog register = 3*1 or 3 seconds).
The accuracy of the timer is within ± the selected resolution.
If the processor does not reset the timer within the specified period, the M41ST85W sets the
WDF (watchdog flag) and generates a watchdog interrupt or a microprocessor reset.
The most significant bit of the watchdog register is the watchdog steering bit (WDS). When
set to a '0,' the watchdog will activate the IRQ/FT/OUT pin when timed-out. When WDS is
set to a '1,' the watchdog will output a negative pulse on the RST pin for t
register, FT, AFE, ABE and SQWE bits will reset to a '0' at the end of a watchdog time-out
when the WDS bit is set to a '1.'
The watchdog timer can be reset by two methods: 1) a transition (high-to-low or low-to-high)
can be applied to the watchdog input pin (WDI) or 2) the microprocessor can perform a
WRITE of the watchdog register. The time-out period then starts over.
The WDI pin should be tied to V
In order to perform a software reset of the watchdog timer, the original time-out period can
be written into the watchdog register, effectively restarting the count-down cycle.
Should the watchdog timer time-out, and the WDS bit is programmed to output an interrupt,
a value of 00h needs to be written to the watchdog register in order to clear the IRQ/FT/OUT
HIGH-Z
SS
if not used.
trec
HIGH-Z
rec
. The watchdog
AI03920
M41ST85W

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