LX256V-35FN484C Lattice, LX256V-35FN484C Datasheet - Page 22

• Manufacturer Part Number: LX256V-35FN484C
• Description: Analog & Digital Crosspoint ICs 256 I/O Switch Matrix, 3.3V, SERDES, 3.5ns, Pb-Free
• Manufacturer: Lattice

Specifications of LX256V-35FN484C

• Maximum Dual Supply Voltage: 3.6 V
• Minimum Dual Supply Voltage: 3 V
• Mounting Style: SMD/SMT
• Number Of Arrays: 1
• Operating Supply Voltage: 3.3 V
• Supply Type: Triple
• Configuration: 256 x 256
• Package / Case: FPBGA-484
• Data Rate: 38 Gbps
• Input Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Output Level: Bus LVDS, LVCMOS, LVDS, LVPECL, LVTTL
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Product: Digital Crosspoint
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 15. Operation in SERDES Only Mode
Notes:
1. Some pins shared. See Logic Signal
Connections table for details.
2. For SERDES only mode programmable bit
holds FIFO in reset. Input registers used for
DOUT, and RECCLK configured as
latches and held in pass through.
GRP
Output
Output
Output
Latch
Latch
Latch
Latch
Latch
Latch
Input
Reg/
Reg/
Input
Reg/
Input
Reg/
Reg/
Reg/
GDX Block
Delay
1, 2
EMPTY
DOUT
RCLK
RE
FULL
FIFORSTb
FIFO
WCLK
19
WE
DIN
PT-CLK/CE(0:3)
GCLK/CE(0:3)
10
10
SYDT
Parallel
Parallel
RECCLK
RXD
Data
Data
TXD
POR
RESETb
SERDES
ispGDX2 Family Data Sheet
CDRRSTb
Serial
Data Out
(SOUT)
Serial
Data In
(SIN)
Pre-Assigned Pins
CAL