IRFR320TRPBF Vishay, IRFR320TRPBF Datasheet - Page 7

MOSFET N-CH 400V 3.1A DPAK

IRFR320TRPBF

Manufacturer Part Number
IRFR320TRPBF
Description
MOSFET N-CH 400V 3.1A DPAK
Manufacturer
Vishay
Datasheet

Specifications of IRFR320TRPBF

Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
1.8 Ohm @ 1.9A, 10V
Drain To Source Voltage (vdss)
400V
Current - Continuous Drain (id) @ 25° C
3.1A
Vgs(th) (max) @ Id
4V @ 250µA
Gate Charge (qg) @ Vgs
20nC @ 10V
Input Capacitance (ciss) @ Vds
350pF @ 25V
Power - Max
2.5W
Mounting Type
Surface Mount
Package / Case
DPak, TO-252 (2 leads+tab), SC-63
Transistor Polarity
N Channel
Continuous Drain Current Id
3.1A
Drain Source Voltage Vds
400V
On Resistance Rds(on)
1.8ohm
Rds(on) Test Voltage Vgs
10V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
Configuration
Single
Resistance Drain-source Rds (on)
1.8 Ohms
Drain-source Breakdown Voltage
400 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
3.1 A
Power Dissipation
2.5 W
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
IRFR320PBFTR

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Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91273.
Document Number: 91273
S10-1135-Rev. C, 10-May-10
Re-applied
voltage
Reverse
recovery
current
+
R
-
g
D.U.T.
Note
a. V
Driver gate drive
D.U.T. l
D.U.T. V
Inductor current
GS
= 5 V for logic level devices
P.W.
SD
DS
waveform
waveform
Peak Diode Recovery dV/dt Test Circuit
Ripple ≤ 5 %
Body diode forward drop
Period
IRFR320, IRFU320, SiHFR320, SiHFU320
Body diode forward
-
+
Fig. 14 - For N-Channel
• dV/dt controlled by R
• Driver same type as D.U.T.
• I
• D.U.T. - device under test
Diode recovery
current
SD
controlled by duty factor “D”
Circuit layout considerations
dV/dt
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
dI/dt
D =
-
g
Period
P.W.
+
V
I
V
SD
GS
DD
= 10 V
+
-
V
DD
a
Vishay Siliconix
www.vishay.com
7

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