CS61535A-IL1Z Cirrus Logic Inc, CS61535A-IL1Z Datasheet - Page 6

• Manufacturer Part Number: CS61535A-IL1Z
• Description: Network Controller & Processor ICs IC T1/E1 Ln Intrfc Unit F/PCM apps
• Manufacturer: Cirrus Logic Inc

Specifications of CS61535A-IL1Z

• Product: Framer
• Number Of Transceivers: 1
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: PLCC-28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

T1 SWITCHING CHARACTERISTICS
GND = 0V; Inputs: Logic 0 = 0V, Logic 1 = RV+; See Figures 1, 2, & 3)
Notes: 29. Crystal must meet specifications described in Appendix A.
6
Crystal Frequency
ACLKI Duty Cycle
ACLKI Frequency
RCLK Duty Cycle
RCLK Cycle Width
Rise Time, All Digital Outputs
Fall Time, All Digital Outputs
TPOS/TNEG (TDATA) to TCLK Falling Setup Time
TCLK Falling to TPOS/TNEG (TDATA) Hold Time
RPOS/RNEG Valid Before RCLK Falling
RDATA Valid Before RCLK Falling
RPOS/RNEG Valid Before RCLK Rising
RPOS/RNEG Valid After RCLK Falling
RDATA Valid After RCLK Falling
RPOS/RNEG Valid After RCLK Rising
TCLK Frequency
TCLK Pulse Width
30. ACLKI provided by an external source or TCLK, but not RCLK.
31. Hardware Mode, or Host Mode (CLKE = 0).
32. RCLK cycle width will vary with extent by which pulses displaced by jitter. Specified under worst case
33. At max load of 1.6 mA and 50 pF.
34. Host Mode (CLKE = 1).
35. Extended Hardware Mode.
36. The maximum TCLK burst rate is 5 MHz and t
37. The transmitted pulse width does not depend on the TCLK duty cycle.
jitter conditions: 0.4 UI AMI data displacement for T1 and 0.2 UI AMI data displacement for E1.
be tolerated on TCLK is 12 VI.
RCLK
RPOS
RNEG
RDATA
BPV
RCLK
Parameter
Figure 1. Recovered Clock and Data Switching Characteristics
(Notes 12, 31, 34, 36, 37)
t pwl1
t
su1
(Notes 35, 36, 37)
t pw1
(Notes 31, 32) t
t
(Note 33)
(Note 34)
(Note 35)
(Note 31)
(Note 29)
(Note 30)
(Note 32)
(Note 33)
(Note 34)
(Note 35)
(Note 31)
t pwh1
h1
(TA = -40°C to 85°C; TV+, RV+ = 5.0V ±5%;
pw2
(min) = 200 ns. The maximum gap size that can
t
pwh3
pwh1
Symbol
t
t
t
f
t
pwh1
t
t
t
t
pwh2
f
aclki
pwl1
pw1
t
t
t
t
su2
su1
su1
su1
tclk
f
h2
h1
h1
h1
t
t
c
r
f
/t
/t
pw3
pw1
Min
320
130
100
150
150
150
150
150
150
150
40
25
25
80
-
-
-
-
-
-
-
6.176000
1.544
1.544
Typ
648
190
458
274
274
274
274
274
274
78
29
EXTENDED
HARDWARE
MODE OR
HOST MODE
(CLKE = 1)
HARDWARE
MODE OR
HOST MODE
(CLKE = 0)
-
-
-
-
-
-
-
CS61535A
Max
980
240
850
500
500
60
85
85
-
-
-
-
-
-
-
-
-
-
-
-
-
DS40F3
Units
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%