LAN8720A-CP-TR SMSC, LAN8720A-CP-TR Datasheet - Page 72

• Manufacturer Part Number: LAN8720A-CP-TR
• Description: Ethernet ICs RMII 10/100 ETH XCVR w/HP AutoMDIXSupport
• Manufacturer: SMSC

Specifications of LAN8720A-CP-TR

• Product: Ethernet Transceivers
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 1.2 (11-10-10)
5.5.4.2
SYMBOL
t
t
t
t
t
ohold
t
ihold
(REF_CLK)
clkp
clkh
oval
t
clkl
su
RXD[1:0],
CRS_DV
TXD[1:0]
CLKIN
RMII Timing (REF_CLK In Mode)
The 50MHz REF_CLK IN timing applies to the case when nINTSEL is floated or pulled-high. In this
mode, a 50MHz clock must be input on the CLKIN pin. For more information on REF_CLK In Mode,
see
Note 5.17 Timing was designed for system load between 10 pf and 25 pf.
RXER
TXEN
CLKIN period
CLKIN high time
CLKIN low time
RXD[1:0], RXER, CRS_DV output valid from
rising edge of CLKIN
RXD[1:0], RXER, CRS_DV output hold from
rising edge of CLKIN
TXD[1:0], TXEN setup time to rising edge of
CLKIN
TXD[1:0], TXEN input hold time after rising edge
of CLKIN
Section 3.7.4.1, "REF_CLK In Mode," on page
t
ihold
Table 5.10 RMII Timing Values (REF_CLK In Mode)
DESCRIPTION
t
Figure 5.5 RMII Timing (REF_CLK In Mode)
ohold
t
su
t
DATASHEET
t
ihold
oval
t
clkh
t
clkp
72
t
clkl
t
su
Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support
34.
t
t
t
clkp
clkp
t
ihold
oval
MIN
3.0
4.0
1.5
20
*0.35
*0.35
t
t
clkp
clkp
MAX
14.0
*0.65
*0.65
t
t
ohold
ihold
SMSC LAN8720A/LAN8720Ai
UNITS
t
oval
ns
ns
ns
ns
ns
ns
ns
t
su
Note 5.17
Note 5.17
Note 5.17
Note 5.17
NOTES
Datasheet