LAN9221I-ABZJ SMSC, LAN9221I-ABZJ Datasheet

LAN9221I-ABZJ

Manufacturer Part Number

LAN9221I-ABZJ

Description

Ethernet ICs 16bit High 10/100 Ethernet Controller

Manufacturer

SMSC

Type

Single Chip MAC and PHY Controllerr

Datasheet

1.LAN9221I-ABZJ.pdf (6 pages)

Specifications of LAN9221I-ABZJ

Ethernet Connection Type

10 Base-T, 100 Base-TX

Minimum Operating Temperature

- 40 C

Mounting Style

SMD/SMT

Product

Ethernet Controllers

Number Of Transceivers

Standard Supported

802.3, 802.3u

Data Rate

10 Mbps, 100 Mbps

Supply Voltage (max)

3.3 V

Supply Voltage (min)

1.8 V

Maximum Operating Temperature

+ 85 C

Package / Case

TQFP-100

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

LAN9221I-ABZJ

Manufacturer:

FREESCALE

Quantity:

920

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

LAN9221I-ABZJ

Manufacturer:

Standard

Quantity:

4 785

Company:

Meier Automation Equipment Co., Limited

Part Number:

LAN9221I-ABZJ

Manufacturer:

SMSC

Quantity:

20 000

Company:

Amily Shenzhen XNWY Technology Co., Ltd

Part Number:

LAN9221I-ABZJ

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PRODUCT FEATURES

Highlights

Key Benefits

SMSC LAN9221/LAN9221i

Target Applications

Optimized for high performance applications

Efficient architecture with low CPU overhead

Easily interfaces to most 16-bit embedded CPU’s

1.8V to 3.3V variable voltage I/O accommodates wide

Integrated PHY with HP Auto-MDIX support

Integrated checksum offload engine helps reduce

Low pin count and small body size package for small

Cable, satellite, and IP set-top boxes

Digital video recorders and DVD recorder/players

Digital TV

Digital media clients/servers and home gateways

Video-over IP solutions, IP PBX & video phones

Wireless routers & access points

High-end audio distribution systems

Non-PCI Ethernet controller for high performance

Minimizes dropped packets

Minimizes CPU overhead

Reduces system cost and increases design flexibility

SRAM-like interface easily interfaces to most

range of I/O signalling without voltage level shifters

CPU load

form factor system designs

applications

— 16-bit interface with fast bus cycle times

— Burst-mode read support

— Internal buffer memory can store over 200 packets

— Automatic PAUSE and back-pressure flow control

— Supports Slave-DMA

— Interrupt Pin with Programmable Hold-off timer

embedded CPU’s or SoC’sReduced Power Modes

— Numerous power management modes

— Wake on LAN

— Magic packet wakeup

— Wakeup indicator event signal

— Link Status Change

High-Performance 16-bit Non-PCI

10/100 Ethernet Controller with Variable

Voltage I/O

PRODUCT PREVIEW

Single chip Ethernet controller

Flexible address filtering modes

Integrated 10/100 Ethernet PHY

Host bus interface

Miscellaneous features

Single 3.3V Power Supply with Variable Voltage I/O

Commercial and Industrial Temperature Support

— Fully compliant with IEEE 802.3/802.3u standards

— Integrated Ethernet MAC and PHY

— 10BASE-T and 100BASE-TX support

— Full- and Half-duplex support

— Full-duplex flow control

— Backpressure for half-duplex flow control

— Preamble generation and removal

— Automatic 32-bit CRC generation and checking

— Automatic payload padding and pad removal

— Loop-back modes

— One 48-bit perfect address

— 64 hash-filtered multicast addresses

— Pass all multicast

— Promiscuous mode

— Inverse filtering

— Pass all incoming with status report

— Disable reception of broadcast packets

— Supports HP Auto-MDIX

— Auto-negotiation

— Supports energy-detect power down

— Simple, SRAM-like interface

— 16-bit data bus

— 16Kbyte FIFO with flexible TX/RX allocation

— One configurable host interrupt

— Small form factor, 56-pin QFN lead-free RoHS

— Integrated 1.8V regulator

— Integrated checksum offload engine

— Mixed endian support

— General Purpose Timer

— Optional EEPROM interface

— Support for 3 status LEDs multiplexed with

LAN9221/LAN9221i

Compliant package

Programmable GPIO signals

Revision 2.7 (03-15-10)

Data Brief

Related parts for LAN9221I-ABZJ

LAN9221I-ABZJ Summary of contents

Page 1

... CPU’s or SoC’sReduced Power Modes — Numerous power management modes — Wake on LAN — Magic packet wakeup — Wakeup indicator event signal — Link Status Change SMSC LAN9221/LAN9221i LAN9221/LAN9221i High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O Single chip Ethernet controller — ...

Page 2

... LAN9221-ABZJ FOR 56-PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE (0 TO +70°C TEMP RANGE) LAN9221i-ABZJ FOR 56-PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE (-40 TO +85°C TEMP RANGE) This product meets the halogen maximum concentration values per IEC61249-2-21 For RoHS compliance and environmental information, please visit 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © ...

Page 3

... The LAN9221/LAN9221i supports numerous power management and wakeup features. The LAN9221/LAN9221i can be placed in a reduced power mode and can be programmed to issue an external wake signal via several methods, including “Magic Packet”, “Wake on LAN” and “Link Status Change” ...

Page 4

... Block Diagram Microprocessor/ Microcontroller Revision 2.7 (03-15-10) High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O System Memory System Peripherals LAN9221/ System Bus LAN9221i 25MHz XTAL EEPROM (Optional) Figure 1 System Block Diagram 4 PRODUCT PREVIEW Magnetics Ethernet LEDS/ GPIO SMSC LAN9221/LAN9221i ...

Page 5

... Dimension “b” applies to plated terminals and is measured between 0.15 and 0.30 mm from the terminal tip. 3. The pin 1 identifier may vary, but is always located within the zone indicated. SMSC LAN9221/LAN9221i Figure 2 56-Pin QFN Package Definition Table 1 56-Pin QFN Package Parameters MAX 1 ...

Page 6

... Figure 3 56-Pin QFN Recommended PCB Land Pattern Revision 2.7 (03-15-10) High-Performance 16-bit Non-PCI 10/100 Ethernet Controller with Variable Voltage I/O 6 PRODUCT PREVIEW SMSC LAN9221/LAN9221i ...

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