COM20020I3V-DZD-TR SMSC, COM20020I3V-DZD-TR Datasheet - Page 42

• Manufacturer Part Number: COM20020I3V-DZD-TR
• Description: Network Controller & Processor ICs 5Mbps ARCNET CTRL 2K x 8 ON-CHIP RAM
• Manufacturer: SMSC

Specifications of COM20020I3V-DZD-TR

• Mounting Style: SMD/SMT
• Package / Case: PLCC-28
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.4.2
Revision 12-05-06
Transmit Sequence
During a transmit sequence, the microcontroller selects a 256 or 512 byte segment of the RAM buffer and
writes into it. The appropriate buffer size is specified in the "Define Configuration" command. When long
packets are enabled, the COM20020ID interprets the packet as either a long or short packet, depending
on whether the buffer address 2 contains a zero or non-zero value. The format of the buffer is shown in
Figure 6.2. Address 0 contains the Source Identifier (SID); Address 1 contains the Destination Identifier
(DID); Address 2 (COUNT) contains, for short packets, the value 256-N, where N represents the number
of information bytes in the message, or for long packets, the value 0, indicating that it is indeed a long
packet. In the latter case, Address 3 (COUNT) would contain the value 512-N, where N represents the
ADDRESS
COUNT
255
511
0
1
2
N = DATA PACKET LENGTH
SID = SOURCE ID
DID = DESTINATION ID
(DID = 0 FOR BROADCASTS)
Figure 6.2 - RAM Buffer Packet Configuration
SHORT PACKET
COUNT = 256-N
DATA BYTE N-1
DATA BYTE N
DATA BYTE 1
DATA BYTE 2
NOT USED
NOT USED
FORMAT
SID
DID
DATASHEET
Page 42
ADDRESS
5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
COUNT
511
0
1
2
3
COUNT = 512-N
DATA BYTE N-1
LONG PACKET
DATA BYTE N
DATA BYTE 1
DATA BYTE 2
NOT USED
FORMAT
SID
DID
0
SMSC COM20020I Rev D
Datasheet