SI3210-KTR Silicon Laboratories Inc, SI3210-KTR Datasheet - Page 134

• Manufacturer Part Number: SI3210-KTR
• Description: Telecom Line Management ICs Sgl Ch SLIC/Codec w/ DTMF Decoder
• Manufacturer: Silicon Laboratories Inc
• Type: ProSLIC Programmable CMOS SLICr

Specifications of SI3210-KTR

• Product: Telecom
• Supply Current: 4 mA
• Maximum Operating Temperature: 100 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: TSSOP-14
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Si3210/Si3211
134
Dimension
Notes:
General
Solder Mask Design
Stencil Design
Card Assembly
1. All dimensions shown are in millimeters (mm) unless otherwise noted.
2. This Land Pattern Design is based on the IPC-7351 guidelines.
1. All metal pads are to be non-solder mask defined (NSMD). Clearance between the solder
1. A stainless steel, laser-cut and electro-polished stencil with trapezoidal walls should be used
2. The stencil thickness should be 0.125mm (5 mils).
3. The ratio of stencil aperture to land pad size should be 1:1 for all perimeter pads
4. A 3x5 array of 0.90mm square openings on 1.10mm pitch should be used for the center
1. A No-Clean, Type-3 solder paste is recommended.
2. The recommended card reflow profile is per the JEDEC/IPEC J-STD-020C specification for
C1
C2
X1
X2
Y1
Y2
mask and the metal pad is to be 60m minimum, all the way around the pad.
to assure good solder paste release.
ground pad.
Small Body Components.
E
Table 49. QFN-38 PCB Land Pattern Dimensions
Pad column spacing
Thermal pad length
Thermal pad width
Pad row spacing
Pin pad width
Pin pad width
Pad pitch
Feature
Rev. 1.5
Min.
4.70
6.70
0.20
3.20
0.80
5.20
0.50 BSC
Max.
4.80
6.80
3.30
5.30
0.30
0.90