DAC-HK12BGC Murata Power Solutions Inc, DAC-HK12BGC Datasheet - Page 2

• Manufacturer Part Number: DAC-HK12BGC
• Description: Digital To Analog Converter
• Manufacturer: Murata Power Solutions Inc

FUNCTIONAL SPECIFICATIONS
(Typical at +25°C and ±15V and +5V supplies unless otherwise noted.)
DATEL
DESCRIPTION
INPUTS
Resolution
Coding, Unipolar Output
Coding, Bipolar Output
Input Logic Level, Bit ON ("1")
Input Logic Level, Bit OFF ("0")
Logic Loading
Load Input ➁
Load Input Loading
PERFORMANCE ➃
Nonlinearity Error, max.
Differential Nonlinearity Error, max.
Gain Error, Before Trimming
Zero Error, Before Trimming
Gain Tempco, max.
Zero Tempco, Unipolar, max.
Offset Tempco, Bipolar, max.
Diff. Nonlinearity Tempco, max.
Monotonicity
Settling Time, 5V Change
Settling Time, 10V Change
Settling Time, 20V Change
Settling Time, 1LSB Change
Slew Rate
Power Supply Rejection
OUTPUTS
Output Voltage Ranges, Unipolar ➄
Output Voltage Ranges, Bipolar ➄
Output Current
Output Impedance
POWER REQUIREMENTS
Power Supply Voltages ➅
PHYSICAL/ENVIRONMENTAL
Operating Temperature Range, Case
Storage Temperature Range
Package Type
Weight
Footnotes:
➀ For two’s complement coding, order the "-2" model as described in
➁ Logic levels are the same as for data inputs.
➂ Initial errors are trimmable to zero. See Connection Diagram.
➃ FSR is full scale range and is 10V for 0 to +10V output range, 20V for ±10V
➄ By external pin connection.
➅ For ±12V, +5V operation, contact factory.
Ordering Information.
output range, etc.
®
12 bits
Straight binary
Offset binary, two’s complement ➀
+2.0V to +5.5V
0V to +0.8V
1 LSTTL load
High (“1”) = hold data
Low (“0”) = transfer data
3 LSTTL loads
0°C to +70°C (BGC/BGC-C, BMC,BMC-C)
-40°C to +85°C (BME, BME-C)
Guaranteed over temperature
(BMM, BMM-C, 883,-C/883)
0.22 ounces (6.3 grams)
+15V, ±0.5V at 15mA
–15V, ±0.5V at 30mA
+5V, ±0.25V at 65mA
0 to +5V, 0 to +10V
±10ppm/°C of FSR
±5ppm/°C of FSR
±2ppm/°C of FSR
–55°C to +125°C
–65°C to +125°C
±0.1% of FSR ➂
±0.002%FSR/%
®
24-pin DDIP
±20ppm/°C
±5mA min.
±0.1% ➂
±1/2LSB
±3/4LSB
±20V/μs
800ns
0.05Ω
±2.5V
±10V
±5V
• 11 Cabot Boulevard, Mansfi eld, MA 02048-1151 USA • Tel: [phone] • www.datel.com • e-mail: [e-mail]
3μs
3μs
4μs
TECHNICAL NOTES
1. It is recommended that these converters be operated with local supply
bypass capacitors of 1μF (tantalum type) at the +15V, –15V and +5V supply
pins. The capacitors should be connected as close to the pins as possible. In
high RFI noise environments, these capacitors should be shunted with 0.01μF
ceramic capacitors.
2. The analog, digital and power grounds should be separated from each other
as close as possible to pin 21 where they all must come together.
3. The “load” control pin is a level-triggered input which causes the register to
hold data with a high input and transfer data to the DAC with a low input.
4. A setup time of 50ns minimum must be allowed for the input data. The DAC
output voltage begins to change when the register output changes.
5. If the reference output terminal (pin 24) is used, an operational amplifi er
in non-inverting mode should be used as a buffer. Current drawn from pin 24
should be limited to ±10μA in order not to affect the T.C. of the reference.
CALIBRATION PROCEDURE
Select the desired output voltage range and connect the converter as shown
in the Output Range Selection Table and the Connection Diagrams. Refer to
the Coding Tables.
Unipolar Operation
1. Zero Adjustment. Set the input digital code to 0000 0000 0000 and
2. Gain Adjustment. Set the input digital code to 1111 1111 1111 (straight
Bipolar Operation
1. Offset Adjustment. Set the digital input code to 0000 0000 0000 (offset
2. Gain Adjustment. Set the digital input code to 1111 1111 1111 (offset
High-Performance, 12-Bit DAC’s with Input Registers
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
Positive Supply, Pin 22
Negative Supply, Pin 14
Logic Supply, Pin 13
Digital Input Voltage, Pins 1–12 & 16
Output Current, Pin 15
Lead Temperature (soldering, 10s)
adjust the ZERO ADJ. potentiometer to give 0.0000V output.
binary) and adjust the GAIN ADJ. potentiometer to give the full-scale
output voltage shown in Table 1.
binary) or 1000 0000 0000 (two’s complement) and adjust the OFFSET
ADJ. potentiometer to give the negative full-scale output voltage shown in
Table 2.
binary) or 0111 1111 1111 (two’s complement) and adjust the GAIN ADJ.
potentiometer to give the positive full-scale output voltage shown in Table 2.
DAC-HK Series
LIMITS
+5.25
+5.5
+18
±20
–18
300
MDA_DAC-HK.B01 Page 2 of 5
UNITS
Volts
Volts
Volts
Volts
mA
°C