DS1856E-002/T&R Maxim Integrated Products, DS1856E-002/T&R Datasheet - Page 23
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DS1856E-002/T&R
Manufacturer Part Number
DS1856E-002/T&R
Description
Digital Potentiometer ICs
Manufacturer
Maxim Integrated Products
Datasheet
1.DS1856B-050.pdf
(31 pages)
Specifications of DS1856E-002/T&R
Number Of Pots
Dual
Taps Per Pot
256
Resistance
10 KOhms, 2.5 KOhms
Wiper Memory
Non Volatile
Digital Interface
Serial (2-Wire)
Operating Supply Voltage
3.3 V, 5 V
Supply Current
2 mA
Maximum Operating Temperature
+ 95 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.85 V
Package / Case
TSSOP-16
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
nally Calibrated Monitors and Password Protection
Dual, Temperature-Controlled Resistors with Inter-
Config
1
Res0 ........................... <R-pw2><W-pw2+TENb><FFh> The base value used for Resistor 0
Res1 ........................... <R-pw2><W-pw2+TENb><FFh> The base value used for Resistor 1
Reserved .................... <R-pw2><W-pw2><00h> SRAM.
Int Enable.................. <R-pw2/W-pw2><NV><F8h> Configures the maskable interrupt for
a)
b) V
c)
d) MON2 Enable.... MON2 measurements, outside of the threshold limits, are enabled to
e)
f)
Config........................ <R-pw2/W-pw2><NV><00h> Configure the memory location and the
a)
b) ADEN ................ Auxiliary Device ENable. 128 bytes of EE are addressable depending
c)
d) Inv1 .................... Enable the inversion of the relationship between IN1 and OUT1.
e)
Chip Address............. This value becomes the Device address for the main memory when
Right Shift
Right Shift
Temp Enable...... Temperature measurements, outside of the threshold limits, are enabled
MON1 Enable.... MON1 measurements, outside of the threshold limits, are enabled to
MON3 Enable.... MON3 measurements, outside of the threshold limits, are enabled to
Reserved ............ EE.
Reserved ............ EE.
ADFIX ............... Device Fixable Address. When this bit is set to a 1, the main memory
Inv2 .................... Enable the inversion of the relationship between IN2 and OUT2.
CC
Enable......... V
1
0
................ Allows for right-shifting the final answer of some voltage
................ Allows for right-shifting the final answer of some voltage
____________________________________________________________________
of the DS1856 is a Device Address equal to the value found in byte
chip_address. When this bit is set to a 0 the main memory of the DS1856
is a Device Address of A2h.
and recalled from Table 4 at the memory address found in T Index.
This register is updated at the end of the Temperature conversion.
on the value of this bit. When set to a 1, the memory is located in or as
Table 01h. When set to a 0, the memory is addressed by using a Device
address of A0h and the locations in memory are 00h to 7Fh.
and recalled from Table 5 at the memory address found in T Index.
This register is updated at the end of the Temperature conversion.
the Out1 pin.
to create an active interrupt on the Out1 pin.
an active interrupt on the Out1 pin.
create an active interrupt on the Out1 pin.
create an active interrupt on the Out1 pin.
create an active interrupt on the Out1 pin.
polarity of the digital outputs.
ADFIX bit is set.
measurements. This allows for scaling the measurements to the smallest
full-scale voltage and then right-shifting the final result so the reading is
weighted to the correct lsb.
measurements. This allows for scaling the measurements to the smallest
full-scale voltage and then right-shifting the final result so the reading is
weighted to the correct lsb.
CC
measurements, outside of the threshold limits, are enabled to create
Register Descriptions (continued)
.
23